PCI Express Device Control and Status Register @0xc8
This register contains control and status bits associated with the device implementing this Function. All the read-write bits in this register can also be written from the local management bus. Likewise, bits designated as RW1C can also be cleared by writing a 1 from the local management bus.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 0 | R | Enable Correctable Error Reporting [ECER] | Reserved | 0x0 |
| 1 | R | Enable Non- Fatal Error Reporting [ENFER] | Reserved | 0x0 |
| 2 | R | Enable Fatal Error Reporting [EFER] | Reserved | 0x0 |
| 3 | R | Enable Unsupported Request Reporting [EURR] | Reserved | 0x0 |
| 4 | R | Enable Relaxed Ordering [ERO] | Reserved | 0x0 |
| 7:5 | R | Max Payload Size [MPS] | Reserved | 0x0 |
| 8 | R | Extended Tag Field Enable [ETFE] | Reserved | 0x0 |
| 9 | R | Enable Phantom Functions [EPF] | Reserved | 0x0 |
| 10 | R | Enable Aux Power [EAP] | Reserved | 0x0 |
| 11 | R | Enable No Snoop [EBS] | Reserved | 0x0 |
| 14:12 | R | Max Read Request Size [MRRS] | Reserved | 0x0 |
| 15 | R/W | Function-Level Reset [FLR] | Writing a 1 into this bit position generated a Function-Level Reset for the selected VF. This bit reads as 0. | 0x0 |
| 16 | R/WOCLR | Correctable Error Detected [CED] | Set to 1 by the core when it detects a correctable error, regardless of whether error reporting is enabled or not, and regardless of whether the error is masked | 0x0 |
| 17 | R/WOCLR | Non-Fatal Error Detected [NFER] | Set to 1 by the core when it detects a non-fatal error, regardless of whether error reporting is enabled or not, and regardless of whether the error is masked. | 0x0 |
| 18 | R/WOCLR | Fatal Error Detected [FED] | Set to 1 by the core when it detects a fatal error, regardless of whether error reporting is enabled or not, and regardless of whether the error is masked. | 0x0 |
| 19 | R/WOCLR | Unsupported Request Detected [URD] | Set to 1 by the core when it receives an unsupported request, regardless of whether its reporting is enabled or not. | 0x0 |
| 20 | R | Aux Power Detected [APD] | Reserved | 0x0 |
| 21 | R | Transaction Pending [TP] | Indicates if any of the Non-Posted requests issued by the VF are still pending. | 0x0 |
| 31:22 | R | Reserved [R4] | Reserved | 0x0 |