Root Error Command Register @0x12c

This register contains bits that control how the RC responds to errors reported by remote devices.

Table 1. i_root_err_cmd

Bits	SW	Name	Description	Reset
0	R/W	Correctable Error Reporting Enable [CERE]	If this bit is set, the Controller will active its CORRECTABLE_ERROR_OUT output in response to an error message received from the link.	0x0
1	R/W	Non-Fatal Error Reporting Enable [NFERE]	If this bit is set, the Controller will active its NON_FATAL_ERROR_OUT output in response to an error message received from the link.	0x0
2	R/W	Fatal Error Reporting Enable [FERE]	If this bit is set, the Controller will active its FATAL_ERROR_OUT output in response to an error message received from the link.	0x0
31:3	R	Reserved [R44]	Reserved	0x0