LTSSM Timer Control Register3 @0xfb8

This register enables control of the LTSSM 32 ms and 48 ms timeout limits.

Table 1. i_ltssm_timer_control_reg3

Bits	SW	Name	Description	Reset
15:0	R/W	LTSSM 32 ms Time Interval [L32MSTM]	This register holds the LTSSM 32 ms timer interval in units of (1024 ns). This register can be tuned to vary the 32 ms timeout in the LTSSM. Default value is set to 16'd31_250 to get exact time interval of 32 ms.	16'd31250
31:16	R/W	LTSSM 48 ms Time Interval [L48MSTM]	This register holds the LTSSM 48 ms timer interval in units of (1024 ns). This register can be tuned to vary the 48 ms timeout in the LTSSM. Default value is set to 16'd46_875 to get exact time interval of 48 ms.	16'd46875