MSIX Function Mask Cleared Status 2 Register @0xd28

This status register has one bit per function. Each function has a 1-bit MSIX Function Mask. If the function's MSIX Function Mask register is configured from 1 to 0, then the corresponding function's status bit in this register is set. Local Firmware needs to clear this register by writing a 1.

Each VF has a 1-bit MSIX Function Mask. Each bit is set only when the MSIX Function Mask Change Enhanced Interrupt Enable bit is set by the User in debug_mux_control_2_reg. When this status bit is set, the Controller asserts LOCAL_INTERRUPT if not masked in local_intrpt_mask_2_reg. Firmware has to clear this bit in order to deassert LOCAL_INTERRUPT.

Table 1. msix_function_mask_cleared_status_2
Bits SW Name Description Reset
0 R/WOCLR VF28 MSIX Function Mask Cleared Status [VF28MSIXMSKCLST] This status bit is set when the VF28 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
1 R/WOCLR VF29 MSIX Function Mask Cleared Status[VF29MSIXMSKCLST] This status bit is set when the VF29 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
2 R/WOCLR VF30 MSIX Function Mask Cleared Status [VF30MSIXMSKCLST] This status bit is set when the VF30 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
3 R/WOCLR VF31 MSIX Function Mask Cleared Status [VF31MSIXMSKCLST] This status bit is set when the VF31 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
4 R/WOCLR VF32 MSIX Function Mask Cleared Status [VF32MSIXMSKCLST] This status bit is set when the VF32 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
5 R/WOCLR VF33 MSIX Function Mask Cleared Status [VF33MSIXMSKCLST] This status bit is set when the VF33 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
6 R/WOCLR VF34 MSIX Function Mask Cleared Status [VF34MSIXMSKCLST] This status bit is set when the VF34 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
7 R/WOCLR VF35 MSIX Function Mask Cleared Status [VF35MSIXMSKCLST] This status bit is set when the VF35 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
8 R/WOCLR VF36 MSIX Function Mask Cleared Status [VF36MSIXMSKCLST] This status bit is set when the VF36 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
9 R/WOCLR VF37 MSIX Function Mask Cleared Status [VF37MSIXMSKCLST] This status bit is set when the VF37 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
10 R/WOCLR VF38 MSIX Function Mask Cleared Status [VF38MSIXMSKCLST] This status bit is set when the VF38 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
11 R/WOCLR VF39 MSIX Function Mask Cleared Status [VF39MSIXMSKCLST] This status bit is set when the VF39 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
12 R/WOCLR VF40 MSIX Function Mask Cleared Status [VF40MSIXMSKCLST] This status bit is set when the VF40 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
13 R/WOCLR VF41 MSIXFunction Mask Cleared Status [VF41MSIXMS] This status bit is set when the VF41 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
14 R/WOCLR VF42 MSIX Function Mask Cleared Status [VF42MSIXMSKCLST] This status bit is set when the VF42 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
15 R/WOCLR VF43 MSIX Function Mask Cleared Status [VF43MSIXMSKCLST] This status bit is set when the VF43 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
16 R/WOCLR VF44 MSIX Function Mask Cleared Status [VF44MSIXMSKCLST] This status bit is set when the VF44 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
17 R/WOCLR VF45 MSIX Function Mask Cleared Status [VF45MSIXMSKCLST] This status bit is set when the VF45 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
18 R/WOCLR VF46 MSIX Function Mask Cleared Status [VF46MSIXMSKCLST] This status bit is set when the VF46 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
19 R/WOCLR VF47 MSIX Function Mask Cleared Status [VF47MSIXMSKCLST] This status bit is set when the VF47 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
20 R/WOCLR VF48 MSIX Function Mask Cleared Status [VF48MSIXMSKCLST] This status bit is set when the VF48 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
21 R/WOCLR VF49 MSIX Function Mask Cleared Status [VF49MSIXMSKCLST] This status bit is set when the VF49 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
22 R/WOCLR VF50 MSIX Function Mask Cleared Status [VF50MSIXMSKCLST] This status bit is set when the VF50 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
23 R/WOCLR VF51 MSIX Function Mask Cleared Status [VF51MSIXMSKCLST] This status bit is set when the VF51 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
24 R/WOCLR VF52 MSIX Function Mask Cleared Status [VF52MSIXMSKCLST] This status bit is set when the VF52 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
25 R/WOCLR VF53 MSIX Function Mask Cleared Status [VF53MSIXMSKCLST] This status bit is set when the VF53 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
26 R/WOCLR VF54 MSIX Function Mask Cleared Status [VF54MSIXMSKCLST] This status bit is set when the VF54 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
27 R/WOCLR VF55 MSIX Function Mask Cleared Status [VF55MSIXMSKCLST] This status bit is set when the VF55 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
28 R/WOCLR VF56 MSIX Function Mask Cleared Status [VF56MSIXMSKCLST] This status bit is set when the VF56 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
29 R/WOCLR VF57 MSIX Function Mask Cleared Status [VF57MSIXMSKCLST] This status bit is set when the VF57 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
30 R/WOCLR VF58 MSIX Function Mask Cleared Status [VF58MSIXMSKCLST] This status bit is set when the VF58 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0
31 R/WOCLR VF59 MSIX Function Mask Cleared Status [VF59MSIXMSKCLST] This status bit is set when the VF59 MSIX Function Mask is programmed or configured from 1 to 0 by Local Firmware Or Host SW. 0x0