Completion Timeout Limit Register 1 @0x3c

This register contains the timeout value used to detect a completion timeout event for a request originated by the Controller from its master interface, when sub-range 2 is programmed in the Device Control 2 Register.

Table 1. i_compln_tmout_lim_1_reg

Bits	SW	Name	Description	Reset
15:0	R/W	Completion Timeout Limit [CTL]	Timeout limit for completion timers. This value is in multiples of 4096 ns. Default value is 200ms. Please note that there could be a variation of 0 to+8us on the programmed Completion Timeout.	16'd48_828
27:16	R	RSVD	RSVD	12'h000
31:28	R	Reserved [R6]	Reserved	0x0