LTSSM Timer Control Register0 @0xfac
This register enables control of the LTSSM 1 ms and 2 ms timeout limits.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 11:0 | R/W | LTSSM 1ms Time Interval [L1MSTM] | This register holds the LTSSM 1 ms timer interval in units of (1024 ns). This register can be tuned to vary the 1 ms timeout in the LTSSM. Default value is set to 16'd977 to get exact time interval of 1 ms. | 12'd977 |
| 15:12 | R | Reserved [R12] | Reserved | 0x0 |
| 27:16 | R/W | LTSSM 2ms Time Interval [L2MSTM] | This register holds the LTSSM 2 ms timer interval in units of (1024 ns). This register can be tuned to vary the 2 ms timeout in the LTSSM. Default value is set to 16'd1954 to get exact time interval of 2 ms. | 12'd1954 |
| 31:28 | R | Reserved [R28] | Reserved | 0x0 |