Power Budgeting Enhanced Capability Header @0x160
This register contains the PCI Express Extended Capability ID for Power Budgeting Capability, its capability version, and the pointer to the next capability structure.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 15:0 | R | PCI Express Extended Capability ID [PECID] | This field is hardwired to the Capability ID assigned by PCI SIG to the PCI Express Power Budgeting Capability (0004 hex). | 0x04 |
| 19:16 | R | Capability Version [PCV] | Specifies the SIG assigned value for the version of the capability structure. This field is set by default to 1, but can be modified from the local management bus by writing into Function 0 from the local management bus. | 0x01 |
| 31:20 | R | Next Capability Offset [PBNCO] | Indicates offset to the next PCI Express capability structure. The default next pointer value is dynamic and is dependent on whether the strap or LMI bits are set. | 12'h1b8 |