Device Serial Number Capability Header Register @0x150

This register contains the PCI Express Extended Capability ID for Device Serial Number Capability, the capability version, and the pointer to the next capability structure.

Table 1. i_dev_ser_num_cap_hdr
Bits SW Name Description Reset
15:0 R PCI Express Extended Capability ID [PECID] This field is hardwired to the Capability ID assigned by PCI SIG to the PCI Express Device Serial Number Capability (0001 hex). 0x03
19:16 R Capability Version [DSNCV] Specifies the SIG assigned value for the version of the capability structure. This field is set by default to 1, but can be modified from the local management bus by writing into Function 0 from the local management bus. 0x01
31:20 R Next Capability Offset [SNNCO] Indicates offset to the next PCI Express capability structure. The default next pointer value is dynamic and is dependent on whether the strap or LMI bits are set. 12'h160