Lane Margining at Receiver Parameters 1 Register @0xcd0
The Lane Margining at Receiver Parameters of the PHY are advertised in this Register.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 0 | R/W | M VoltageSupported [MVS] |
|
0x1 |
| 1 | R/W | M IndUpDownVoltage [MINDUDVS] |
|
0x1 |
| 2 | R/W | M IndLeftRightTimings [MINDLRTS] |
|
0x1 |
| 3 | R/W | M SampleReporting [MSRM] |
|
0x0 |
| 4 | R/W | M IndErrorSampler [MIES] |
|
0x1 |
| 11:5 | R/W | M NumVoltageSteps [MNVS] | Number of voltage steps from default (either up or down), minimum range +/-50 mV as measured by 16.0 GT/s reference equalizer Voltage offset must increase monotonically. The number of steps in both positive and negative direction from the default sample location must be identical This value is undefined if M VoltageSupported is 0b. | 0x20 |
| 17:12 | R/W | M NumTimingSteps [MNTS] | Number of time steps from default (to either left or right), range must be at least +/-0.2 UI. Timing offset must increase monotonically. The numberof steps in both positive (toward the end of the unit interval) and negative (toward the beginning of the unit interval) must be identical. | 0x6 |
| 23:18 | R/W | M MaxTimingOffset [MMTO] | Offset from default at maximum step value as percentage of a nominal UI at 16.0 GT/s A 0 value may be reported if the vendor chooses not to report the offset. | 0x14 |
| 29:24 | R/W | M MaxVoltageOffset [MMVO] | Offset from default at maximum step value as percentage of one volt. A 0 value may be reported if the vendor chooses not to report the offset. | 0x5 |
| 31:30 | R | Reserved [RES] | Reserved | 0x0 |