DL GEN1 Receive DLLP Count Debug Register @0x144

This register indicates the total number of DLLPs received by the Controller in GEN1. This counter rolls over back to 0 after 4G DLLPs are received. This register can be used for Debug purposes.

Table 1. i_debug_dllp_count_gen1_reg
Bits SW Name Description Reset
31:0 R GEN1DLLP Count [DLLPCNT1] Reflects the total number of DLLPs received by the Controller at GEN1 speed. 0x0