SR-IOV Control and Status Registers @0x208
This location contains the SR-IOV Control Register and the SR-IOV Status Register.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 0 | R/W | VF Enable [VFE] | This bit must be set to enable the VFs associated with this PF. | 0x0 |
| 1 | R | VF Migration Enable [VFME] | Not supported. Hardwired to 0 | 0x0 |
| 2 | R | VF Migration Interrupt Enable [VFMIE] | Not supported. Hardwired to 0 | 0x0 |
| 3 | R/W | VF Memory Space Enable [VFMSE] | This bit must be set to allow access to the memory space of the VFs associated with this PF. | 0x0 |
| 4 | R/W | ARI Capable Hierarchy [ARIE] | This bit enables the ARI mode for Virtual Functions. ARI Capable Hierarchy is only present in the lowest numbered PF which is enabled (for example PF0) and affects all PFs of the Device. ARI Capable Hierarchy is Read Only Zero in other PFs of a Device. | 0x0 |
| 5 | R | VF 10-Bit Tag Requester Enable [T10RE] | 10-bit TAGs generation are not supported in this configuration. | 0x0 |
| 15:6 | R | Reserved [R15] | Reserved | 0x0 |
| 31:16 | R | SRIOV Status Register [SSR] | Not implemented. | 0x0 |