L1 State Re-Entry Delay Register @0x40
This register specifies the time the Controller will wait before it re-enters the L1 state if its link partner transitions the link to L0 while all the Functions of the Controller are in D3 power state. The Controller will change the power state of the link from L0 to L1 if no activity is detected both on the transmit and receive sides before this interval, while all Functions are in D3 state and the link is in L0. Setting this register to 0 disables re-entry to L1 state if the link partner returns the link to L0 from L1 when all the Functions of the Controller are in D3 state. This register controls only the re-entry to L1. The initial transition to L1 always occurs when all of the Functions of the Controller are set to the D3 state.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 31:0 | R/W | L1 Re-Entry Delay [L1RD] | Delay to re-enter L1 after no activity (in units of 16 ns). | 0x0 |