MSI-X Pending Interrupt Register @0xb8
This register is used to specify the location of the MSI-X Pending Bit Array (PBA). The PBA is a structure in memory containing the pending interrupt bits. All the 32 bits of this register can be re-written independently for each Function from the local management bus.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 2:0 | R | BAR Indicator Register [BARI1] | Identifies the BAR corresponding to the memory address range where the PBA Structure is located (000 = BAR 0, 001 = BAR 1, ... , 101 = BAR 5). The value programmed must be the same as the BAR Indicator configured in the MSI-X Table Offset Register. Identifies the BAR corresponding to the memory address range where the PBA Structure is located (000 = BAR 0, 001 = BAR 1, ... , 101 = BAR 5). The value programmed must be the same as the BAR Indicator configured in the MSI-X Table Offset Register. | 3'd0 |
| 31:3 | R | PBA Offset [PBAO] | Offset of the memory address where the PBA is located relative to the selected BAR. The three least significant bits of the address are omitted as the addresses are QWORD aligned. | 29'h1 |