Link Capabilities Register 2 @0xec

This register is not implemented for Virtual Functions. A read to this address returns the Device Capabilities 2 Register fields of Physical Function 0.

Table 1. i_link_cap_2_reg
Bits SW Name Description Reset
0 R RSVD RSVD 1'h0
4:1 R Supported Link Speeds Vector [SLSV] This field indicates the supported link speeds of the Controller. For each bit, a value of 1 indicates that the corresponding link speed is supported, while a value of 0 indicates that the corresponding speed is not supported. The bits corresponding to various link speeds are:
  • Bit 1 = Link Speed 2.5 GT/s
  • Bit 2 = Link Speed 5 GT/s
  • Bit 3 = Link Speed 8 GT/s
  • Bit 4 = Link Speed 16 GT/s
This field is hardwired to 00001 (2.5 GT/s) when the PCIE_GENERATION_SEL strap pins of the Controller are set to 000 , 00011 (2.5 and 5 GT/s) when the strap is set to 001 , and 00111 (2.5, 5, and 8 GT/s) when the strap pin is set to 010 , and 01111 (2.5, 5, 8 GT/s and 16 GT/s) when the strap pin is set to 011. For PF0, this field can be written through the LM interface.		 0xf
5 R RSVD RSVD 1'h0
8:6 R Reserved [R1] Reserved 0x0
12:9 R Lower SKP OS Generation Supported Speeds Vector [LSOGSSV] If this field is non-zero, it indicates that the Port, when operating at the indicated speed(s) supports SRIS and also supports software control of the SKP Ordered Set transmission scheduling rate. 0x0
15:13 R Reserved [R2] Reserved 0x0
19:16 R Lower SKP OS Reception Supported Speeds Vector [LSORSSV] If this field is non-zero, it indicates that the Port, when operating at the indicated speed(s) supports SRIS and also supports receiving SKP OS at the rate defined for SRNS while running in SRIS. 0x0
20 R RSVD RSVD 1'h0
22:21 R Reserved [R3] Reserved 0x0
23 R Retimer Presence Detect Supported [RTPDS] When set to 1b, this bit indicates that the associated Port supports detection and reporting of Retimer presence. This bit is valid for both Downstream Ports and Upstream Ports. 0x1
24 R Two Retimers Presence Detect Supported [TWRTPDS] When set to 1b, this bit indicates that the associated Port supports detection and reporting of two Retimers presence. This bit is valid for both Downstream Ports and Upstream Ports. 0x1
30:25 R Reserved [R25] Reserved 0x0
31 R DRS Supported [R31] Indicates support for the optional Device Readiness Status (DRS) capability. This capability is currently not supported in the Controller. 0x0