Lane Margining at Receiver Error Status 1 Register @0xcdc
The Lane Margining at Receiver SW Error Status fields are implemented in this Register.
| Bits | SW | Name | Description | Reset |
|---|---|---|---|---|
| 15:0 | R | Invalid SW Margining Command [ISWMC] | When the Controller receives an Invalid Margining Command from SW in its configuration register, the 16-bit command is logged in this registerfor debug. Only the first Error is logged in this register. This register is valid only when Bit-4, Invalid SW Margining Command Received, of the i_local_error_status_2_register is set. Bit-4 of the i_local_error_status_2_register has to be cleared by local firmware before another error can be logged in this field. . | 0x0 |
| 19:16 | R | Invalid SW Margining Command Lane Number [ISWMCLN] | This field reports the Lane Number for which the Invalid command was received. 0000: Lane 0.0001: Lane 1. and so on. This register is valid only when Bit-4, Invalid SW Margining Command Received, of the i_local_error_status_2_registeris set. Bit-4 of the i_local_error_status_2_register has to be cleared by local firmware before another error can be logged in this field. | 0x0 |
| 31:20 | R | Reserved [RES] | Reserved | 0x0 |