Completion Timeout Limit Register 0 @0x38

This register contains the timeout value used to detect a completion timeout event for a request originated by the Controller from it master interface, when sub-range 1 is programmed in the Device Control 2 Register.

Table 1. i_compln_tmout_lim_0_reg

Bits	SW	Name	Description	Reset
15:0	R/W	Completion Timeout Limit [CTL]	Timeout limit for completion timers. This value is in multiples of 4096 ns. Default value is 50ms. Please note that there could be a variation of 0 to+8us on the programmed Completion Timeout.	16'd12207
23:16	R	RSVD	RSVD	8'h00
31:24	R	Reserved [R5]	Reserved	0x0