<project>.timing.rpt
| In GUI | |
| In file system | <project>/outflow |
| Created by | Efinity software during the route step |
| Design source? | No |
The software creates this file after routing. This static timing analysis report contains detailed information about your design's critical paths. The report has several sections:
- Clock Frequency Summary—Shows a summary of the clocks in your design and their constraints. It uses the critical paths to show the maximum clock frequency that each clock can achieve. In the summary you can check the clock constraints defined in your SDC file, the maximum frequency of the clocks in your design, and the edge of the launch clocks and capture clocks.
- Clock Relationship Summary—Lists the related clocks, their constraints, and the slack. The report shows measurements using the active clock edge. This report shows how many pairs of launch clocks and capture clocks are involved when routing your design and the slack of the most critical setup path among related clocks. If any of the clock relationships have negative slack, your design has not closed timing.
- Path Details for Max Critical Paths—Shows the critical paths for the maximum (setup) critical paths. The report only shows the most critical path for each relationship. This section gives detailed information for the Launch Clock Path, Capture Clock Path, Data Path (including Clock To Q + Data Path Delay). Usually, the most efficiency way to reduce the data path delay is to fix negative slack.
- Path Details for Min Critical Paths—Shows the critical paths for the minimum (hold) critical paths. The report only shows the most critical path for each relationship.
Notice: Refer to Interpreting Timing Results and Tools for Exploring Timing in the Efinity Timing Closure User Guide.