SOC Property Reference

The SOC block properties are applicable to the Titanium family.

Table 1. SOC Properties

API Name	GUI Name	Values
NAME	Instance Name	Instance Name
RESOURCE	SOC Resource	N
OCR_FILE_PATH	On-Chip RAM Configuration File	File Path

Table 2. Clock/Control Properties

API Name	GUI Name	Values
SYS_CLK_SOURCE	System Clock Source	Clock 0, Clock 1, Clock 2, Unassign
MEM_CLK_SOURCE	Memory Clock Source	Clock 0, Clock 1, Clock 2, Unassign
PIPELINE_SOC_AXI_MEM_​INTERFACE_EN	Enable the pipeline for SoC AXI memory interface	0, 1
IO_ASYNCRESET_PIN	Active-High Async Reset Pin Name	Pin name
IO_PERIPHERALCLK_PIN	Periphery Controller Clock Pin Name	Pin name
IO_PERIPHERALCLK_​INVERT_EN	Invert Periphery Controller Clock Pin Name	0, 1
IO_PERIPHERALRESET_PIN	Active-High Periphery Controller Reset Pin Name	Pin name
IO_SYSTEMRESET_PIN	Active-High System Reset Pin Name	Pin name
WRITEBUFFER_SOC_AXI_​INTERFACE_EN	Bypass the AXI write buffer	0, 1

Table 3. User AXI Master Properties

API Name	GUI Name	Values
AXI_MASTER_EN	Enable AXI Master Interface	0, 1
IO_DDRMASTERS_0_CLK_PIN	User AXI Master Clock Pin Name	Pin name
IO_DDRMASTERS_0_CLK_​INVERT_EN	Invert User AXI Master Clock Pin Name	0, 1
IO_DDRMASTERS_0_RESET_PIN	User AXI Master Reset Pin Name	Pin name

Table 4. Master Read Address Channel Properties

API Name	GUI Name	Values
IO_DDRMASTERS_0_AR_​PAYLOAD_ADDR_PIN	User Read Address [31:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_BURST_PIN	User Read Burst Type [1:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_CACHE_PIN	User Read Memory Type [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_ID_PIN	User Read Address ID [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_LEN_PIN	User Read Burst Length [7:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_LOCK_PIN	User Read Lock Type Pin Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_PROT_PIN	User Read Protection Type [2:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_QOS_PIN	User Read QoS [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_REGION_PIN	User Read Region Identifier [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​PAYLOAD_SIZE_PIN	User Read Burst Size [2:0] Bus Name	Pin name
IO_DDRMASTERS_0_AR_​READY_PIN	User Read Address Ready Pin Name	Pin name
IO_DDRMASTERS_0_AR_​VALID_PIN	User Read Address Valid Pin Name	Pin name

Table 5. Master Write Address Channel Properties

API Name	GUI Name	Values
IO_DDRMASTERS_0_AW_​PAYLOAD_ADDR_PIN	User Write Address [31:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_ALLSTRB_PIN	User Write All Strobe Pin Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_BURST_PIN	User Write Burst Type [1:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_CACHE_PIN	User Write Memory Type [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_ID_PIN	User Write Address ID [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_LEN_PIN	User Write Burst Length [7:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_LOCK_PIN	User Write Lock Type Pin Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_PROT_PIN	User Write Protection Type [2:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_QOS_PIN	User Write QoS [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_REGION_PIN	User Write Region Identifier [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​PAYLOAD_SIZE_PIN	User Write Burst Size [2:0] Bus Name	Pin name
IO_DDRMASTERS_0_AW_​READY_PIN	User Write Address Ready Pin Name	Pin name
IO_DDRMASTERS_0_AW_​VALID_PIN	User Write Address Valid Pin Name	Pin name

Table 6. Master Write Response Channel Properties

API Name	GUI Name	Values
IO_DDRMASTERS_0_B_​PAYLOAD_ID_PIN	User Write Response ID [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_B_​PAYLOAD_RESP_PIN	User Write Response [1:0] Bus Name	Pin name
IO_DDRMASTERS_0_B_​READY_PIN	User Write Response Ready Pin Name	Pin name
IO_DDRMASTERS_0_B_​VALID_PIN	User Write Response Valid Pin Name	Pin name

Table 7. Master Read Data Channel Properties

API Name	GUI Name	Values
IO_DDRMASTERS_0_R_​PAYLOAD_DATA_PIN	User Read Data [127:0] Bus Name	Pin name
IO_DDRMASTERS_0_R_​PAYLOAD_ID_PIN	User Read ID [3:0] Bus Name	Pin name
IO_DDRMASTERS_0_R_​PAYLOAD_LAST_PIN	User Read Last Pin Name	Pin name
IO_DDRMASTERS_0_R_​PAYLOAD_RESP_PIN	User Read Response [1:0] Bus Name	Pin name
IO_DDRMASTERS_0_R_​READY_PIN	User Read Ready Pin Name	Pin name
IO_DDRMASTERS_0_R_​VALID_PIN	User Read Valid Pin Name	Pin name

Table 8. Master Write Data Channel Properties

API Name	GUI Name	Values
IO_DDRMASTERS_0_W_​PAYLOAD_DATA_PIN	User Write Data [127:0] Bus Name	Pin name
IO_DDRMASTERS_0_W_​PAYLOAD_LAST_PIN	User Write Last Pin Name	Pin name
IO_DDRMASTERS_0_W_​PAYLOAD_STRB_PIN	User Write Strobe [15:0] Bus Name	Pin name
IO_DDRMASTERS_0_W_​READY_PIN	User Write Ready Pin Name	Pin name
IO_DDRMASTERS_0_W_​VALID_PIN	User Write Valid Pin Name	Pin name

Table 9. User AXI Slave Properties

API Name	GUI Name	Values
AXI_SLAVE_EN	Enable AXI Slave Interface	0, 1
AXIAINTERRUPT_PIN	User AXI Slave Channel Interrupt Pin Name	Pin name

Table 10. Slave Read Address Channel Properties

API Name	GUI Name	Values
AXIA_ARADDR_PIN	User Read Address [31:0] Bus Name	Pin name
AXIA_ARBURST_PIN	User Read Burst Type [1:0] Bus Name	Pin name
AXIA_ARCACHE_PIN	User Read Memory Type [3:0] Bus Name	Pin name
AXIA_ARLEN_PIN	User Read Burst Length [7:0] Bus Name	Pin name
AXIA_ARLOCK_PIN	User Read Lock Type Pin Name	Pin name
AXIA_ARPROT_PIN	User Read Protection Type [2:0] Bus Name	Pin name
AXIA_ARQOS_PIN	User Read QoS [3:0] Bus Name	Pin name
AXIA_ARREADY_PIN	User Read Address Ready Pin Name	Pin name
AXIA_ARREGION_PIN	User Read Region Identifier [3:0] Bus Name	Pin name
AXIA_ARSIZE_PIN	User Read Burst Size [2:0] Bus Name	Pin name
AXIA_ARVALID_PIN	User Read Address Valid Pin Name	Pin name

Table 11. Slave Write Address Channel Properties

API Name	GUI Name	Values
AXIA_AWADDR_PIN	User Write Address [31:0] Bus Name	Pin name
AXIA_AWBURST_PIN	User Write Burst Type [1:0] Bus Name	Pin name
AXIA_AWCACHE_PIN	User Write Memory Type [3:0] Bus Name	Pin name
AXIA_AWLEN_PIN	User Write Burst Length [7:0] Bus Name	Pin name
AXIA_AWLOCK_PIN	User Write Lock Type Pin Name	Pin name
AXIA_AWPROT_PIN	User Write Protection Type [2:0] Bus Name	Pin name
AXIA_AWQOS_PIN	User Write QoS [3:0] Bus Name	Pin name
AXIA_AWREADY_PIN	User Write Address Ready Pin Name	Pin name
AXIA_AWREGION_PIN	User Write Region Identifier [3:0] Bus Name	Pin name
AXIA_AWSIZE_PIN	User Write Burst Size [2:0] Bus Name	Pin name
AXIA_AWVALID_PIN	User Write Address Valid Pin Name	Pin name

Table 12. Slave Write Response Channel Properties

API Name	GUI Name	Values
AXIA_BREADY_PIN	User Write Response Ready Pin Name	Pin name
AXIA_BRESP_PIN	User Write Response [1:0] Bus Name	Pin name
AXIA_BVALID_PIN	User Write Response Valid Pin Name	Pin name

Table 13. Slave Read Data Channel Properties

API Name	GUI Name	Values
AXIA_RDATA_PIN	User Read Data [31:0] Bus Name	Pin name
AXIA_RLAST_PIN	User Read Last Pin Name	Pin name
AXIA_RREADY_PIN	User Read Ready Pin Name	Pin name
AXIA_RRESP_PIN	User Read Response [1:0] Bus Name	Pin name
AXIA_RVALID_PIN	User Read Valid Pin Name	Pin name

Table 14. Slave Write Data Channel Properties

API Name	GUI Name	Values
AXIA_WDATA_PIN	User Write Data [31:0] Bus Name	Pin name
AXIA_WLAST_PIN	User Write Last Pin Name	Pin name
AXIA_WREADY_PIN	User Write Ready Pin Name	Pin name
AXIA_WSTRB_PIN	User Write Response [3:0] Bus Name	Pin name
AXIA_WVALID_PIN	User Write Valid Pin Name	Pin name

Table 15. Custom Instruction 0-3 Properties

API Name	GUI Name	Values
CUSTOM_INSTRUCTION_n_EN	Enable Custom Instruction Interface n	0, 1
CPUn_CUSTOMINSTRUCTION_​CMD_READY_PIN	Custom Instruction Unit n Command Ready Pin Name	Pin name
CPUn_CUSTOMINSTRUCTION_​CMD_VALID_PIN	Custom Instruction Unit n Command Valid Pin Name	Pin name
CPUn_CUSTOMINSTRUCTION_​FUNCTION_ID_PIN	Custom Instruction Unit n Function ID [9:0] Bus Name	Pin name
CPUn_CUSTOMINSTRUCTION_​INPUTS_0_PIN	Custom Instruction Unit n Register S0 [31:0] Bus Name	Pin name
CPUn_CUSTOMINSTRUCTION_​INPUTS_1_PIN	Custom Instruction Unit n Register S1 [31:0] Bus Name	Pin name
CPUn_CUSTOMINSTRUCTION_​OUTPUTS_0_PIN	Custom Instruction Unit n Output [31:0] Bus Name	Pin name
CPUn_CUSTOMINSTRUCTION_​RSP_READY_PIN	Custom Instruction Unit n Result Ready Pin Name	Pin name
CPUn_CUSTOMINSTRUCTION_​RSP_VALID_PIN	Custom Instruction Unit n Result Valid Pin Name	Pin name
IO_CFUCLK_PIN	Custom Instruction Unit Clock Pin Name	Pin name
IO_CFUCLK_INVERT_EN	Invert Custom Instruction Unit Clock Pin Name	0, 1
IO_CFURESET_PIN	Active Synchronous Reset for Custom Instruction Unit Pin Name	Pin name

Table 16. External Interrupt Properties

API Name	GUI Name	Values
USERINTERRUPTA_PIN	External Interrupt A: Pin Name	Pin name
USERINTERRUPTB_PIN	External Interrupt B: Pin Name	Pin name
USERINTERRUPTC_PIN	External Interrupt C: Pin Name	Pin name
USERINTERRUPTD_PIN	External Interrupt D: Pin Name	Pin name
USERINTERRUPTE_PIN	External Interrupt E: Pin Name	Pin name
USERINTERRUPTF_PIN	External Interrupt F: Pin Name	Pin name
USERINTERRUPTG_PIN	External Interrupt G: Pin Name	Pin name
USERINTERRUPTH_PIN	External Interrupt H: Pin Name	Pin name
USERINTERRUPTI_PIN	External Interrupt I: Pin Name	Pin name
USERINTERRUPTJ_PIN	External Interrupt J: Pin Name	Pin name
USERINTERRUPTK_PIN	External Interrupt K: Pin Name	Pin name
USERINTERRUPTL_PIN	External Interrupt L: Pin Name	Pin name
USERINTERRUPTM_PIN	External Interrupt M: Pin Name	Pin name
USERINTERRUPTN_PIN	External Interrupt N: Pin Name	Pin name
USERINTERRUPTO_PIN	External Interrupt O: Pin Name	Pin name
USERINTERRUPTP_PIN	External Interrupt P: Pin Name	Pin name
USERINTERRUPTQ_PIN	External Interrupt Q: Pin Name	Pin name
USERINTERRUPTR_PIN	External Interrupt R: Pin Name	Pin name
USERINTERRUPTS_PIN	External Interrupt S: Pin Name	Pin name
USERINTERRUPTT_PIN	External Interrupt T: Pin Name	Pin name
USERINTERRUPTU_PIN	External Interrupt U: Pin Name	Pin name
USERINTERRUPTV_PIN	External Interrupt V: Pin Name	Pin name
USERINTERRUPTW_PIN	External Interrupt W: Pin Name	Pin name
USERINTERRUPTX_PIN	External Interrupt X: Pin Name	Pin name

Table 17. Debug Properties

API Name	GUI Name	Values
JTAG_TYPE	JTAG Interface Type	CPU, DISABLE, FPGA
IO_JTAG_TCK_PIN	JTAG TCK Pin Name	Pin name
IO_JTAG_TCK_INVERT_EN	Invert JTAG TCK Pin Name	0, 1
IO_JTAG_TDI_PIN	JTAG TDI Pin Name	Pin name
IO_JTAG_TDO_PIN	JTAG TDO Pin Name	Pin name
IO_JTAG_TMS_PIN	JTAG TMS Pin Name	Pin name
JTAGCTRL_CAPTURE_PIN	JTAG TAP Controller Capture Pin Name	Pin name
JTAGCTRL_ENABLE_PIN	JTAG TAP Controller Enable Pin Name	Pin name
JTAGCTRL_RESET_PIN	JTAG TAP Controller Reset Pin Name	Pin name
JTAGCTRL_SHIFT_PIN	JTAG TAP Controller Shift Pin Name	Pin name
JTAGCTRL_TCK_PIN	JTAG TAP Controller TCK Pin Name	Pin name
JTAGCTRL_TCK_INVERT_EN	Invert JTAG TAP Controller TCK Pin Name	0, 1
JTAGCTRL_TDI_PIN	JTAG TAP Controller TDI Pin Name	Pin name
JTAGCTRL_TDO_PIN	JTAG TAP Controller TDO Pin Name	Pin name
JTAGCTRL_UPDATE_PIN	JTAG TAP Controller Update Pin Name	Pin name