Timing Exceptions
Timing exceptions are constraints that override the default behavior between clocks. These constraints are:
set_false_path—Cuts the path between the source and destination.set_max_delay,set_min_delay—Overrides the required time needed from the source to the destination for the specified paths.set_multicycle_path—Changes the clock edges used for the required timing calculation from the source to the destination.
Tip: Refer to Example: Clock-to-Clock Path with Control for an example use
case.
When working with exceptions, if the same path has more than one exception, the constraints are prioritized in the following order:
set_clock_groupsset_false_pathset_max_delay and set_min_delayset_multicycle_path