Best Practices for Constraining Routing

Follow these guidelines when constraining routing to ensure consistency for register and signal names when you re-compile.

Use a consistent naming convention, such as netname_LOCKED, for all constrained nets. This methodology lets you identify them in the template files more easily.
Limit routing constraints (if possible) to named single-fanout signals between named registers.
Use the syn_keep synthesis attribute—for all locked registers and the signals between locked registers—to tell synthesis to keep the signals during optimization. If you do not use syn_keep, the software might optimize away the net you want to constrain.
```
(* syn_keep = "true" *) wire netname_LOCKED;
```
In your .rcf, do not point to the .troutingtraces file in the project outflow directory. This file is overwritten each time you compile. Instead, move the .troutingtraces file into another directory and point to it in that location.
Note: Titanium and Topaz only.
Use routing constraints sparingly; excessive constraints make it hard to close timing.
Implement constrained routing as late in the design cycle as possible (when you have fewer changes to your design).

Note: Although you can use constrained routing on combinational paths, primitive cell names (for example LUT names) on these paths may change if you modify unrelated sections of the design and re-run synthesis. As a result, you may need to update your <project>.out.placeloc file to reflect the new primitive cell names.