Editing and Viewing the Package Pinout

The Package Planner provides a visual representation of the FPGA package pins. Each pin is color coded by function (such as GPIO, configuration, power, etc.) letting you easily see which package pin has which function. Additionally, you can highlight I/O banks, PLL reference clocks, global clocks, and global controls so you can quickly find a specific pin that has the feature you need. This tool is helpful when planning how to map the signals in your design to package pins.

The Package Planner has a variety of options to display various types of pins. For example, you can highlight VREF pins, MIPI RX groups, and clocks. In v2025.2 and higher, you can also view the assigned pins and differential pin pairs.