Floating-Point Operation

The DSP block supports a fused multiply add (FMA) operation in BFLOAT16 format. BFLOAT16 is mapped to 16 bits as shown in the following figure.

Figure 1. BFLOAT16 Format

Efinity synthesis does not support inferred floating-point operations in Titanium DSP blocks. Instead, To use this function you must instantiate the EFX_DSP48 primitive and set the MODE parameter to BFLOAT. In this mode, the DSP block inputs A, B, and C be in BFLOAT16 format, and the resulting output O is in 32-bit floating-point format (FP32). The accumulation happens internally in 32-bit floating-point. All pipeline registers (except O_REG) must be enabled for correct operation. The following code shows an example instantiation of the primitive:

EFX_DSP48 dut (.A(a), .B(b), .C(18'd0), .OP(op), .O(o), .CASCIN({48{1'b0}}),
        .CLK(clk), .RST(rst), .CE(1'b1), .SHIFT_ENA(1'b0));
    defparam dut.MODE  = "BFLOAT";
    defparam dut.M_SEL = "P";
    defparam dut.N_SEL = "W";
    defparam dut.W_SEL = "X";
    defparam dut.A_REG = 1;
    defparam dut.B_REG = 1;
    defparam dut.C_REG = 0;
    defparam dut.P_REG = 1;
    defparam dut.OP_REG = 1;
    defparam dut.W_REG = 1;
    defparam dut.O_REG = 0;
    defparam dut.RST_POLARITY = 1;