Simulate with the ModelSim Simulator

By default, the Efinity® software calls the iVerilog simulator. Use the --modelsim option to target the ModelSim simulator instead.

Note: The simulator must be in your path for the simulation to run properly.

For example, the commands to simulate are:

Simulate with ModelSim

Linux:
efx_run.py <project name>.xml --flow rtlsim --modelsim     // Behavioral simulation
efx_run.py <project name>.xml --flow map                   // Synthesize the design
efx_run.py <project name>.xml --flow mapsim --modelsim     // Post-synthesis simulation
Windows:
efx_run.bat <project name>.xml --flow rtlsim --modelsim     // Behavioral simulation
efx_run.bat <project name>.xml --flow map                   // Synthesize the design
efx_run.bat <project name>.xml --flow mapsim --modelsim     // Post-synthesis simulation
The simulator responds with
  • PASS if the simulation is successful.
  • FAIL if the simulation is unsuccessful.

The software saves simulation results (<flow>.rtl.simlog and <flow>.map.simlog) and error messages (<flow>.log) in your project's outflow directory.

Simulate with the ModelSim GUI

The ModelSim GUI uses a macro file of your simulation files and workspace for simulation.
  1. Create a new macro file <project name>.do in your project directory.
  2. For behavioral simulation, define your workspace and include your source code.
  3. For post-synthesis simulation, define your workspace, include the post-mapping synthesis file, and include the simulation models for Efinix primitives.
  4. Add the vsim -t ps <work space>.<test bench module name> command to start simulation in the ps timeframe.
  5. Add the run <number>us command to generate a waveform up to <number> μs.
  6. Run the ModelSim software in the Transcript console.
  7. Change to the project root directory.
  8. Use the do command to execute the macro (do <name>.do).
  9. Add signals to the waveform in the Objects tab.
  10. View the simulation result in the Wave tab.

The following examples show the macro files for behavioral and post-synthesis simulation for the helloworld design provided with the Efinity® software.

Figure 1. Bevhavioral Simulation Example .do Macro
vlib work
vmap work work

vlog "helloworld.v"
vlog "led.v"
vlog "reset.v"
vlog "helloworld_tb.v"

vsim -t ps work.sim
run 1us
Figure 2. Post-Synthesis Simulation Example .do Macro
The Efinity software provides additional primitives, but they are not used for simulation.
vlib work
vmap work work

vlog "outflow/helloworld.map.v"

vlog "<path to Efinity>/sim_models/verilog/efx_add.v"
vlog "<path to Efinity>/sim_models/verilog/efx_dpram_5k.v"
vlog "<path to Efinity>/sim_models/verilog/efx_ff.v"
vlog "<path to Efinity>/sim_models/verilog/efx_gbufce.v"
vlog "<path to Efinity>/sim_models/verilog/efx_lut4.v"
vlog "<path to Efinity>/sim_models/verilog/efx_mult.v"
vlog "<path to Efinity>/sim_models/verilog/efx_ram_5k.v"

vlog "helloworld_tb.v"

vsim -t ps work.sim
run 1us