Example: Soft SERDES

This example is for a soft SERDES. It has LVDS bypass mode sampling with 4 different clock phases (0, 90, 180 and 270 degrees). In this use case, you use the -add_delay option to set constraints for both edges of both clocks. If you did not use the -add_delay option then the second constraint would overwrite the first one.

Figure 1. Dynamic Clock Multiplexer Example

SDC Commands

# these constraints are for 0 degrees
set_input_delay -clock i_sclk_000 -max 0.924 [get_ports {i_lvds_rxd}]
set_input_delay -clock i_sclk_000 -min 0.616 [get_ports {i_lvds_rxd}]

# The following constraints use -add_delay to avoid overwriting the previous setting

# these constraints are for 90 degrees, 
set_input_delay -clock i_sclk_090 -max 0.924 [get_ports {i_lvds_rxd}] -add_delay
set_input_delay -clock i_sclk_090 -min 0.616 [get_ports {i_lvds_rxd}] -add_delay

# these constraints are for 180 degrees
set_input_delay -clock i_sclk_000 -clock_fall -max 0.924 [get_ports {i_lvds_rxd}] -add_delay
set_input_delay -clock i_sclk_000 -clock_fall -min 0.616 [get_ports {i_lvds_rxd}] -add_delay

# these constraints are for 270 degrees
set_input_delay -clock i_sclk_090 -clock_fall -max 0.924 [get_ports {i_lvds_rxd}] -add_delay
set_input_delay -clock i_sclk_090 -clock_fall -min 0.616 [get_ports {i_lvds_rxd}] -add_delay