<project>.pt.sdc

In GUI Result pane > Interfaces menu
In file system <project>/outflow
Created by Interface Designer when generating constraints
Design source? No

The Interface Designer creates this file when you generate constraints. The file is a template SDC that you use to create your own SDC file. You copy and paste the constraints into your own SDC and modify it as needed.

There are several types of contraints:
  • Clock constraints—These constraints define the clocks and virtual clocks in your design. The file has create_clock constraints for the PLL clocks (the SDC file defines a clock period) and any GPIO clocks, that is, GPIO used as GCLK (you need to define the clock period for these).
  • GPIO constraints—These constraints define the input delay and output delay from registered IO to core as well as input delay and output delay from non-registered IO to core.
  • Periphery constraints—These are constraints for any interfaces, such as LVDS, MIPI, DDR, etc.
Notice: See Copy and Paste the Interface Constraints in the Efinity Timing Closure User Guide for instructions on using this file.