New in v2025.2

The Efinity® software v2025.2 has the following new features and enhancements:
  • Device Support—Added Q3 speed grade for Ti135 and Ti375 in the N484 package
  • Efficiency improvements
    • 30% runtime improvement
    • Memory usage reduced by 25% for Titanium and Topaz families and 30% for Trion family
    • All devices only require 8 GB of memory
    • 85% (6.7x) reduction in database file sizes
    Unified design flow
    • Adds instantiation support for MIPI lanes
    • All remaining blocks must be instantiated with the Interface Designer, GUI, or Python API
  • Unified Simulation—Adds support for complex blocks with encrypted models
  • Efinity software now generates a hierarchical placement report
  • SDC support for set_bus_skew and report_bus_skew commands
  • Debugger and Programmer
    • Transceiver Debugger now includes bathtub view
    • Supports Python-JTAG co-debug feature
    • Auto JTAG chain detection
  • IP Manager and IP Packager
    • Improved performance when generating or upgrading large complex IP cores (e.g., DMA, Sapphire SoCs)
    • Improvements for controlling device-specific IP and dependent IP configurations
  • Package Planner
    • Multiple pin/pad selection, in-place I/O standard editing, drag and drop
    • Visual indication of HSIO pairs
  • New example designs
    • Includes a new example directory with all example designs
    • New examples target the Ti60 F225 Development Board by default; include .isf files so you can target other Efinix boards (most are supported)
    • Old tutorials and demo project remain in the old locations for now (will obsolete in a future software release)