Introduction

The Efinity® software provides a complete tool flow for designing with Efinix® FPGAs and cores. The graphical user interface (GUI) provides a visual way for you to set up projects, run the software flow, view floorplan information, and build the interfaces that surround the logic portion of your design. You use the command-line to perform simulation and automate the flow using scripts.

Table 1. Titanium FPGAs Supported in Efinity® Software v2025.2 (or Patches)¹

FPGA	Package	Bitstream	Timing	Pinout
Ti35	F100, F100S3F2, F225, F256		Final	Final
Ti60	V64, W64, F100, F100S3F2, F225, F256		Final	Final
Ti85	N441, N484, N676		Preliminary	Final
	N576	–	Preliminary	Preliminary
Ti90	J361, G400, J484, L484, G529		Final	Final
Ti120	J361, G400, J484, L484, G529		Final	Final
Ti135	N441, N484, N676		Preliminary	Final
	N576	–	Preliminary	Preliminary
	N576D2F4	–	Preliminary	Preliminary
Ti165	N484, C529, N900, N1156		Final	Final
Ti180	J361, G400, J484, L484, M484, G529		Final	Final
	J484D1		Final	Final
Ti240	N484, C529, N900, N1156		Final	Final
Ti375	N484, C529, N900, N1156		Final	Final

Table 2. Topaz FPGAs Supported in Efinity® Software v2025.2 (or Patches)²

FPGA	Package	Bitstream	Timing	Pinout
Tz50	F100, F225, F256		Final	Final
Tz75, Tz100	N441, N484, N676		Preliminary	Final
	N576	–	Preliminary	Preliminary
Tz110, Tz170	J361, J484, G400		Final	Final
Tz200, Tz325	C529		Final	Final
	N484		Preliminary	Final
	N900		Preliminary	Final

Table 3. Trion FPGAs Supported in Efinity® Software v2025.2

FPGA	Package	Bitstream	Timing	Pinout
T4	F49, F81		Final	Final
T8	F49, F81, Q144		Final	Final
T13	Q100F3, F169, F256		Final	Final
T20	W80, Q100F3, F169, Q144, F256, F324, F400		Final	Final
T35	F324, F400		Final	Final
	F256		Final	Final
T55, T85, T120	F324, F484, F576		Final	Final