Methods for Closing Timing
You have created your RTL, you have designed your board, now you need to close timing, and you are stuck. Knowing what to do for that last bit of tweaking to achieve your desired fMAX can be difficult. When creating the Efinity® software, Efinix® software engineers have chosen default values for the tool flow to achieve the best trade-off between performance and runtime for a large number of benchmark designs. Your design, however, is unique, and may benefit from non-default settings to get the performance you need.
In general, it is best to start by choosing good synthesis options, then placement options, then routing options. First choose high-level options that work well, then run a seed sweep using those options to take advantage of noise and use the best result. You set synthesis and place-and-route options for your project in the Project Editor.