<project>.map.peri.v
| In GUI | |
| In file system | <project>/outflow |
| Created by | Efinity software during the synthesis step. |
| Design source? | No |
The Efinity software creates this file during the synthesis step. Post-mapping netlist file for simulation with the unified design flow. This file is only generated in the unified design flow and contains the interface logic as well as the core netlist..