Vendor Specific (VSEC) Interface Signals

Table 1. Vendor Specific (VSEC) Interface
Signal Direction Width Clock Domain Description
F0_VSEC_CONTROL_IN Input 8 AXI_CLK Read the input state from Vendor-Specific Control Register bits [7:0 ] in the PF0 Vendor-Specific Capability Structure. The setting does not affect the operation of the PCIe Controller.
F1_VSEC_CONTROL_IN Input 8 AXI_CLK Read the input state from Vendor-Specific Control Register bits [7:0 ] in the PF1 Vendor-Specific Capability Structure. The setting does not affect the operation of the PCIe Controller.
F2_VSEC_CONTROL_IN Input 8 AXI_CLK Read the input state from Vendor-Specific Control Register bits [7:0 ] in the PF2 Vendor-Specific Capability Structure. The setting does not affect the operation of the PCIe Controller.
F3_VSEC_CONTROL_IN Input 8 AXI_CLK Read the input state from Vendor-Specific Control Register bits [7:0 ] in the PF3 Vendor-Specific Capability Structure. The setting does not affect the operation of the PCIe Controller.
F0_VSEC_INTERRUPT_OUT Output 1 AXI_CLK Driven by Vendor-Specific Control Register bit [8] in the PF0 Vendor-Specific Capability Structure. The host can use it to signal a software-driven interrupt to the application logic outside the PCIe Controller.
F1_VSEC_INTERRUPT_OUT Output 1 AXI_CLK Driven by Vendor-Specific Control Register bit [8] in the PF1 Vendor-Specific Capability Structure. The host can use it to signal a software-driven interrupt to the application logic outside the PCIe Controller.
F2_VSEC_INTERRUPT_OUT Output 1 AXI_CLK Driven by Vendor-Specific Control Register bit [8] in the PF2 Vendor-Specific Capability Structure. The host can use it to signal a software-driven interrupt to the application logic outside the PCIe Controller.
F3_VSEC_INTERRUPT_OUT Output 1 AXI_CLK Driven by Vendor-Specific Control Register bit [8] in the PF3 Vendor-Specific Capability Structure. The host can use it to signal a software-driven interrupt to the application logic outside the PCIe Controller.