Slot Status Register
| Bit | Description | Attributes | Implementation |
|---|---|---|---|
| 0 | Attention Button Pressed. If an Attention Button is implemented, this bit is Set when the attention button is pressed. If an Attention Button is not supported, this bit must not be Set. | RW1C |
Driven by the ATTENTION_BUTTON_N
input. This bit is set to '1' when ATTENTION_BUTTON_N
changes from 1-0. Cleared when a '1' is written into this
bit.
|
| 1 |
Power Fault Detected. If a Power Controller that supports power fault
detection is implemented, this bit is Set when the Power Controller detects a power
fault at this slot. Note that, depending on hardware capability, it is possible that
a power fault can be detected at any time, independent of the Power Controller
Control setting or the occupancy of the slot. If power fault detection is not
supported, this bit must not be Set.
|
RW1C | Driven by the POWER_FAULT_N input. This bit is set to '1' when POWER_FAULT_N changes from 1 - 0. Cleared when a '1' is written into this bit. |
| 2 | MRL Sensor Changed. If an MRL sensor is implemented, this bit is Set when a MRL Sensor state change is detected. If an MRL sensor is not implemented, this bit must not be Set. | RW1C | Driven by the MRL_SENSOR_N input. This bit is set to '1' when MRL_SENSOR _N changes from 1 - 0 OR 0 - 1. Cleared when a '1' is written into this bit. |
| 3 | Presence Detect Changed. This bit is set when the value reported in the Presence Detect State bit is changed. | RW1C | Driven by the PRSNT_N input. This bit is set to '1' when PRSNT _N changes from 1 - 0 OR 0 - 1. Cleared when a '1' is written into this bit. |
| 4 |
Command Completed. If Command Completed notification is supported (if the
No Command Completed Support bit in the Slot Capabilities register is 0b), this bit
is Set when a hot-plug command has completed and the Hot-Plug Controller is ready to
accept a subsequent command.
The Command Completed status bit is Set as an indication to host
software that the Hot-Plug Controller has processed the previous
command and is ready to receive the next command; it provides
no
guarantee that the action corresponding to the command is
complete.
If Command Completed notification is not supported, this bit
must be hardwired to 0b.
|
RW1C |
Driven by the COMMAND_COMPLETED
input. This bit is set to '1' on the COMMAND_COMPLETED
pulse. Cleared when a '1' is written into this bit.
|
| 5 |
MRL Sensor State. This bit reports the status of the MRL sensor if
implemented. Defined encodings are:
0b: MRL Closed
1b: MRL Open
|
RO | Connected to MRL_SENSOR_N input. |
| 6 |
Presence Detect State. This bit indicates the presence of an adapter in the
slot, reflected by the logical "OR" of the Physical Layer in-band presence detect
mechanism and, if present, any out-of-band presence detect mechanism defined for the
slot's corresponding form factor. Note that the in-band presence detect mechanism
requires that power be applied to an adapter for its presence to be detected.
Consequently, form factors that require a power controller for hot-plug
must implement a physical pin presence detect mechanism. Defined encodings are:
0b: Slot Empty
1b: Card Present in slot
This bit must be implemented on all Downstream Ports that
implement slots. For Downstream Ports not connected to
|
RO | Connected to ~PRSNT_N input. |
|
slots (where the Slot Implemented bit of
the PCI Express Capabilities register is 0b), this bit must be
hardwired to 1b.
|
|||
| 7 |
Electromechanical Interlock Status. If an Electromechanical Interlock is
implemented, this bit indicates the status of the Electromechanical Interlock.
Defined encodings are:
0b: Electromechanical Interlock Disengaged
1b: Electromechanical Interlock Engaged
|
RO | Connected to EMI_STATUS input |
| 8 | Data Link Layer State Changed. This bit is Set when the value reported in the Data Link Layer Link Active bit of the Link Status register is changed. In response to a Data Link Layer State Changed event, software must read the Data Link Layer Link Active bit of the Link Status register to determine if the Link is active before initiating configuration cycles to the hot plugged device. | RO | Connected to Link Status Register DLL Active Bit |