Appendix C: LTSSM State Encoding
The following table provides the LTSSM state encoding for the PCIe Controller's
LTSSM_STATE output signal as well the state read from the Physical Layer
Configuration Register 0.
| LTSSM State Name | Register Value (Hex) |
|---|---|
| Detect.Quiet | 00 |
| Detect.Active | 01 |
| Polling.Active | 02 |
| Polling.Compliance | 03 |
| Polling.Configuration | 04 |
| Configuration.Linkwidth.Start | 05 |
| Configuration.Linkwidth.Accept | 06 |
| Configuration.Lanenum.Accept | 07 |
| Configuration.Lanenum.Wait | 08 |
| Configuration.Complete | 09 |
| Configuration.Idle | 0A |
| Recovery.RcvrLock | 0B |
| Recovery.Speed | 0C |
| Recovery.RcvrCfg | 0D |
| Recovery.Idle | 0E |
| L0 | 10 |
| Rx_L0s.Entry | 11 |
| Rx_L0s.Idle | 12 |
| Rx_L0s.FTS | 13 |
| Tx_L0s.Entry | 14 |
| Tx_L0s.Idle | 15 |
| Tx_L0s.FTS | 16 |
| L1.Entry | 17 |
| L1.Idle | 18 |
| L2.Idle | 19 |
| L2.TransmitWake | 1A |
| Disabled | 20 |
| Loopback.Entry (Master) | 21 |
| Loopback.Active (Master) | 22 |
| Loopback.Exit (Master) | 23 |
| Loopback.Entry (Slave) | 24 |
| Loopback.Active (Slave) | 25 |
| Loopback.Exit (Slave) | 26 |
| Hot Reset | 27 |
| Recovery.Equalization, Phase 0 | 28 |
| Recovery.Equalization, Phase 1 | 29 |
| Recovery.Equalization, Phase 2 | 2A |
| Recovery.Equalization, Phase 3 | 2B |