Error and Decode Errors

The following table lists the different status codes and their causes. The decode_err indicates a usage error and points to incorrect user programming of the AXI outbound address. This error is fatal; the behavior of the PCIe Controller after this error is not deterministic.

The user application should:
  • Fix the programming error causing the decode error.
  • Reset the PCIe Controller to recover from this error.
Table 1. AXI Slave Error and Decode Error Cases
Cases Indication Register MASTER_AXI_​​RUSER_STATUS Description AXI Response
Normal completion. N/A 5'b000 The completion returned by the link partner has no errors. OK
The completion TLP received from the link was poisoned. Poisoned TLP status in AER Uncorrectable Status Register
Detected parity error bit in Command Status Register
5'b001 The completion received from the link was poisoned. SLVERR
Request terminated by a completion TLP with UR, CA, or CRS status. Received target abort status bit in Command and Status Register only for CA 5'b010 Request terminated by a completion TLP with UR, CA, or CRS status by the link partner. SLVERR
Read request terminated by a completion TLP with incorrect byte count. N/A 5'b011 The returned completion did not match the request stored locally for byte count. SLVERR
The current completion being delivered has the same tag as an outstanding request, but its requester ID, TC, or Attr fields did not match the parameters of the outstanding request. N/A 5'b100 The returned completion did not match the request stored locally for requester ID, TC, or Attr fields. SLVERR
Error in start address. N/A 5'b101 The completion start address bits [6:0] did not match the request start address. SLVERR
Request terminated by a completion timeout, or by a function-level reset (FLR) targeting the function that generated the request. Completion timeout status in AER Uncorrectable Error Status Register and Local Error Status Register
FLR_IN_PROGRESS pin is asserted to indicate FLR
5'b111 A completion timeout or FLR terminated the request. SLVERR
Link down reset indication bit set. Link down indication bit in the AXI configuration registers is set N/A N/A SLVERR
AXI slave read/write addresses did not match any of the AXI base addresses programmed in the outbound regions. N/A 5'b10000 The AXI slave read or write address did not match any of the AXI base addresses programmed in the outbound region. DECERR
Internal error in the PCIe completion path buffers. Uncorrectable error in the AXI reorder RAM or completion RAM 5'b01000 The ECC/parity decoder flagged an uncorrectable error while reading from any of the completion path buffers. SLVERR