Error Handling

During read data transfers, the client can indicate read data errors by asserting TARGET_AXI_RRESP to an error code (i.e., SLVERR or DECERR) on any valid data transfer cycle. The PCIe Controller sends a completer abort completion status back to the requester. The client must not do an early burst termination and transfer all the data cycles as indicated by the TARGET_AXI_ARLEN signal during the request cycle.