Introduction
Features
Functional Description
Clock Sources
Link Control
Power Management
Configuring Registers with the APB Interface
Configuration Snoop Interface
Vendor-Specific Extended Capability (VSEC)
Configuration Guide
Managing Outbound NP Outstanding Requests and Completion Responses (Endpoint)
Interface Signals
Appendix A: Acronyms and Abbreviations
Appendix B: Error Handling
Appendix C: LTSSM State Encoding
Appendix D: PCIe Configuration Capabilities Linked List
- Configuration-Specific Capabilities
Appendix E: Supported Chipsets
Appendix E: Skew
Appendix F: Hot Plug Support
Revision History

TLP Read of Lengths > 32 Bytes

Table 1. TLP Read of Lengths > 32 Bytes
TLP Parameter		AXI Read Address Channel
Addr[4:0] (Hex)	Length in Bytes (Decimal)	Addr[4:0] (Hex)	ARSIZE (Binary)	ARLEN (Hex)
0x1	34	0x1	101	0x1
0x5	50	0x5	101	0x1
0x1E	72	0x1E	101	0x3

Parent topic: AXI Master Read Operation