Function-Level Reset Signals
These signals are only used in endpoint mode. Refer to Function-Level Reset (FLR) for a more comprehensive overview of handshake.
| Signal Name | Direction | Width | Clock Domain | Descriptions |
|---|---|---|---|---|
| FLR_IN_PROGRESS | Output | 4 | AXI_CLK |
There
are four PFs in the PCIe Controller, where FLR_IN_PROGRESS[0, 1, 2, 3] correlates to
PF[0, 1, 2, 3], respectively. The PCIe Controller asserts FLR_IN_PROGRESS[n] to
indicate the PF that received FLR. Example: When the PCIe Controller asserts
FLR_IN_PROGRESS[3], it signals that PF[3] is currently performing an FLR.
FLR_IN_PROGRESS[3] remains asserted until the PCIe Controller receives the FLR_DONE[3]
assertion from the user. The subsequent de-assertion of FLR_IN_PROGRESS[3] indicates
that the FLR process for PF3 has finished.Note: When a PF
undergoes an FLR, all the associated VFs undergo the FLR
too. |
| VF_FLR_IN_PROGRESS | Output | 64 | AXI_CLK | There are 64 VFs in the PCIe Controller, where VF_FLR_IN_PROGRESS[0, 1, ..., 63] correlates to VF[0, 1, …, 63], respectively. The PCIe Controller asserts VF_FLR_IN_PROGRESS[n] to indicate the nth VF received FLR. VF_FLR_IN_PROGRESS[n] remains asserted until the PCIe Controller receives the VF_FLR_DONE[n] assertion from the user. The de-assertion of VF_FLR_IN_PROGRESS[n] marks the completion of FLR in the nth VF. |
| FLR_DONE | Input | 4 | AXI_CLK | When FLR_IN_PROGRESS[n] asserts, you need to clear any pending transactions associated with the PF/VF being reset. Then, assert FLR_DONE[n] and hold FLR_DONE[n] high until FLR_IN_PROGRESS[n] finishes de-asserting. |
| VF_FLR_DONE | Input | 64 | AXI_CLK | When VF_FLR_IN_PROGRESS[n] asserts, you need to clear any pending transactions associated with the VF being reset. Then, assert VF_FLR_DONE[n] and hold VF_FLR_DONE[n] high until FLR_IN_PROGRESS[n] finishes de-asserting. |