Non-Contiguous Writes

The PCIe specification allows memory writes with non-contiguous byte enables for single-DWord writes, and for two-DWORD writes when the address is aligned on an 8-byte boundary. For these write transactions, the AXI master interface sets the byte valid bits on the TARGET_AXI_WSTRB signal based on the valid bytes indicated in the header of the request TLP. The client must ensure that the individual bytes on the TARGET_AXI_WDATA bus are only written to memory when the corresponding byte valid is asserted.