Memory or I/O TLP Access

For this example, assume that the one of the PCIe Controller's memory regions has an AXI region base address of 64'h0000_0000_0010_0000 (region 1 as shown in the following figure) with a region size of 1 Mbytes. Assume you want to write to the 64'h0000_0000_3000_0000 base address.

When you program the Outbound PCIe Descriptor Register you assign a specific TLP type to the region number. Follow the values to be programmed in the desc0, desc1, desc2, and desc3 registers given in Outbound PCIe Descriptor Registers Memory or I/O TLPs column.

Figure 1. Outbound AXI to PCIe Address Translation Register Programming

Table 1. AXI Region Base Address Register and Outbound AXI to PCIe Address Translation Register Values
Register	Value	Register	Value
AXI_ADDR0[5:0]	6'd19	AXI_ADDR0[5:0]	6'd19
AXI_ADDR0[31:8]	24'h00_1000	AXI_ADDR0[31:8]	24'h30_0000
AXI_ADDR1[31:0]	32'h0000_0000	AXI_ADDR1[31:0]	32'h0000_0000