Message Interface Codes
| Message Code | Routing | Type | Description | Mode | Integration Comment | Number of DW |
|---|---|---|---|---|---|---|
| 0000_0000 | 011 | Msg | Unlock | DM | - | 2 |
| 0000_0001 | 010 | MsgD | Invalidate Request Message | EP | The PCIe Controller takes no action and forwards the message to the message interface. Endpoint client logic must invalidate the corresponding address translation table entries upon receiving this message. | 4 |
| 0000_0010 | 010 | Msg | Invalidate Completion Message | RP | The PCIe Controller takes no action and forwards the message to the message interface. Indicates completion of invalidation operation. | 4 |
| 0000_0100 | 000 | Msg | Page Request Message | RP | The PCIe Controller takes no action and forwards the message to the message interface. Client must take appropriate action. | 4 |
| 0000_0101 | 010 | Msg | PRG Response Message | EP | The PCIe Controller takes no action and forwards the message to the message interface. Client must take appropriate action. | 4 |
| 0001_0000 | 100 | Msg | Latency Tolerance Reporting Message | RP | Internally captured by PCIe Controller and compared with the L1_pm_substates_control1_reg_LTR_L1_2_threshold to determine L1.2 substate entry. Client can ignore this message. | 4 |
| 0001_0010 | 100 | Msg | OBFF | EP | If OBFF_ENABLE[1:0] == 01 or 10, the PCIe Controller forwards the OBFF message to the message interface. Otherwise it reports it as UR. Client can optionally process the OBFF message to determine the CPU activity. | 4 |
| 0001_0100 | 100 | Msg | PM_Active_State_Nak | EP | Internally processed during ASPM L1 Entry negotiation. Also forwarded to message interface. Client can ignore this message. | 2 |
| 0001_1000 | 000 | Msg | PM_PME | RP |
The PCIe Controller takes no action and forwards the message to
the message interface. Client must process this message per PCIe power management
specifications.
For example, the root port can issue a CfgWr to change the requesting
function power state to D0.
|
2 |
| 0001_0001 | 011 | Msg | PME_Turn_Off | EP |
If all function power states are in non-D0 state and if PME Turnoff Ack Delay
> 0x0000, the PCIe Controller automatically transmits a PME_TO_Ack
message after the PME Turnoff Ack Delay time. In this case, the client logic should
not send PME_TO_ACK.
Otherwise, the client logic must respond with the PME_TO_Ack message.
|
2 |
| 0001_0011 | 101 | Msg | PME_To_Ack | RP | The PCIe Controller takes no action and forwards the message to the message interface. Client can choose to turn off the power after receiving this message. | 2 |
| 0010_0000 | 100 | Msg | Assert_INTA | RP | The PCIe Controller asserts INTA_OUT upon receiving this message. Client can ignore this message and only use INTA_OUT. | 2 |
| 0010_0001 | 100 | Msg | Assert_INTB | RP | The PCIe Controller asserts INTB_OUT upon receiving this message. Client can ignore this message and only use INTB_OUT. | 2 |
| 0010_0010 | 100 | Msg | Assert_INTC | RP | The PCIe Controller asserts INTC_OUT upon receiving this message. Client can ignore this message and only use INTC_OUT. | 2 |
| 0010_0011 | 100 | Msg | Assert_INTD | RP | The PCIe Controller asserts INTD_OUT upon receiving this message. Client can ignore this message and only use INTD_OUT. | 2 |
| 0010_0100 | 100 | Msg | Deassert_INTA | RP | The PCIe Controller de-asserts INTA_OUT upon receiving this message. Client can ignore this message and only use INTA_OUT. | 2 |
| 0010_0101 | 100 | Msg | Deassert_INTB | RP | The PCIe Controller de-asserts INTB_OUT upon receiving this message. Client can ignore this message and only use INTB_OUT. | 2 |
| 0010_0110 | 100 | Msg | Deassert_INTC | RP | The PCIe Controller de-asserts INTC_OUT upon receiving this message. Client can ignore this message and only use INTC_OUT. | 2 |
| 0010_0111 | 100 | Msg | Deassert_INTD | RP | The PCIe Controller de-asserts INTD_OUT upon receiving this message. Client can ignore this message and only use INTD_OUT. | 2 |
| 0011_0000 | 000 | Msg | ERR_CORR | RP | The PCIe Controller asserts CORRECTABLE_ERROR_DETECTED_OUT for one clock cycle when it receives a ERR_CORR message. Client can ignore this message and only use CORRECTABLE_ERROR_DETECTED_OUT. | 2 |
| 0011_0001 | 000 | Msg | ERR_NONFATAL | RP | The PCIe Controller asserts NON_FATAL_ERROR_DETECTED_OUT for one clock cycle when it receives a ERR_CORR message. Client can ignore this message and only use NON_FATAL_ERROR_DETECTED_OUT. | 2 |
| 0011_0001 | 000 | Msg | ERR_FATAL | RP | The PCIe Controller asserts FATAL_ERROR_DETECTED_OUT for one clock cycle when it receives a ERR_CORR message. Client can ignore this message and only use FATAL_ERROR_DETECTED_OUT. | 2 |
| 0100_0000 | 100 | Msg | Ignored | NA | – | 2 |
| 0100_0000 | 100 | Msg | Ignored | NA | – | – |
| 0100_0001 | 100 | Msg | Ignored | NA | – | – |
| 0100_0011 | 100 | Msg | Ignored | NA | – | – |
| 0100_0100 | 100 | Msg | Ignored | NA | – | – |
| 0100_0101 | 100 | Msg | Ignored | NA | – | – |
| 0100_0111 | 100 | Msg | Ignored | NA | – | – |
| 0101_0000 | 100 | Msg | Set_Slot_Power_Limit | EP | The PCIe Controller stores the data from the received message in the Captured Slot Power Limit Scale and Value fields in Device Capabilities Register. Client can ignore this message. | 2 |
| 0111_1110 | 000, 010, 011, 100 | Msg, MsgD | VD Msg Type0 | DM | The PCIe Controller takes no action and forwards the message to the message interface. Processing of Vendor Defined Message is implementation specific. | 4 |
| 0111_1111 | 000, 010, 011, 100 | Msg, MsgD | VD Msg Type1 | DM | The PCIe Controller takes no action and forwards the message to the message interface. Processing of a vendor-defined message is implementation specific. | 4 |