Vendor-Specific Extended Capability (VSEC)

The PCIe specification strongly recommends that PCIe devices do not place in the configuration space any registers other than those that are architected by the PCIe specification.

Device-specific registers that need to be placed in configuration space (e.g., they need to be accessible before memory space is allocated) can be placed in the Vendor-Specific Extended Capability (VSEC) structure in PCIe extended configuration space. This structure lets you use the extended capability mechanism to expose vendor-specific registers; for example, vendor-specific features that are used in a series of components from that vendor. A VSEC structure can tell vendor-specific software which features a particular component supports, including components developed after the software was released.

The PCIe Controller implements the VSEC register structure with 8 bytes of vendor-specific registers. Additionally, it provides a custom interface to help you access the vendor-specific registers directly, including:
  • PCI Express Extendeed Capability Register
  • Vendor-Specific Header
  • Vendor-Specific Registers

Per the PCIe specification, the vendor-specific register structure and definition is determined by the vendor, indicated by the vendor ID field located at byte offset 00h in the PCI-compatible configuration space. The number of bytes of vendor-specific registers are advertised in the VSEC Length field.

The PCIe Controller implemetns 8 bytes of vendor-specific registers in:

  • i_vendor_specific_control_reg, address @0x408
  • i_vendor_specific_data_reg0, address @0x40c
Table 1. i_vendor_specific_control_reg Fields
Bits Attributes Descriptions
7:0 RO These bits are read only for the host. The client can control these bits with the F0_VSEC_CONTROL_IN[7:0] input. The host's vendor-specific software can access these bits with a configuration read.
8 RW These bits are read/write for the host. The host's vendor-specific software can access these bits with a configuration read or write. Bit 8 drives the PCIe Controller's F0_VSEC_INTERRUPT_OUT output.
31:9 RW These bits are read/write for the host. The host's vendor-specific software can access these bits with a configuration read or write. Bits [31:9] drive the PCIe Controller' F0_VSEC_CONTROL_OUT[22:0] output.
Table 2. i_vendor_specific_data_reg0 Fields
Bits Attributes Descriptions
31:0 RW These bits are read/write for the host. The host's vendor-specific software can access these bits with a configuration read or write.
  • F0_VSEC_CONTROL_IN—This input drives bits [7:0] of the vendor-specific registers. The value to be driven on this input and its applications are specific to the user application.
  • F0_VSEC_INTERRUPT_OUT—This output is driven by bit [8] of the vendor-specific registers in the PF0 vendor-specific capability structure. The signal is available for the user application; for example, the host can use it to signal a software-driven interrupt to the client application outside the PCIe Controller.
  • F0_VSEC_CONTROL_OUT—This output is driven by bits [31:9] of the vendor-specific registers in the PF0 vendor-specific capability structure. The signal is available for the user application; for example, the host can ujse this signal to indicate vendor specific control data to the client application outside the PCIe Controller.