Ethernet SGMII Pins Tab

This tab has several sub-tabs for defining the Ethernet SGMII interface pins.

Table 1. Pins Tab: Clock and Reset Sub-Tab Settings

Parameter	Choices	Notes
Interface Clock Input Connection Type	gclk, rclk	Default: rclk. Choose whether to use a global clock (gclk) or regional clock (rclk).
Interface Clock X2 Input Connection Type	rclk, gclk	Default: rclk. Choose whether to use a global clock (gclk) or regional clock (rclk) for the X2 clock.
Interface Clock Input Pin Name	User defined	Specify the pin names. Efinix recommends using the default names.
Interface Clock X2 Input Pin Name
PCS Receive Reset Pin Name
PCS Transmit Reset Pin Name
PHY Lane Reset Pin Name

Table 2. Pins Tab: Control Sub-Tab

Parameter	Selection	Notes
PMA Transmit Electrical Idle Pin Name	User defined	Efinix recommends using the default names.

Table 3. Pins Tab: Error And Status Sub-Tab Settings

Parameter	Selection	Notes
CTC Error Pin Name	User defined	Define the pin names for the error and status signals. Efinix recommends using the default names.
PHY Interrupt Pin Name
Sync Status Pin Name

Table 4. Pins Tab: Power Up Sub-Tab Settings

Parameter	Selection	Notes
Link PLL Clock Enable Acknowledge Pin Name	User defined	Define the pin names for the signals used when the interface powers up. Efinix recommends using the default names.
Link PLL Clock Enable Pin Name
Link Power State Acknowledge [3:0] Bus Name
Link Power State Request [3:0] Bus Name
PMA Receiver Signal Detect Pin Name

Table 5. Pins Tab: SGMII Sub-Tab Settings

Parameter	Selection	Notes
PCS Auto Negotiation Complete Pin Name	User defined	Define the pin names for the signals used for the SGMII signals. Efinix recommends using the default names.
Receive GMII Control [1:0] Bus Name
Receive GMII Data [15:0] Bus Name
Receive GMII Error [1:0] Bus Name
SGMII Mode [1:0] Bus Name
Transmit GMII Data [15:0] Bus Name
Transmit GMII Enable [1:0] Bus Name
Transmit GMII Error [1:0} Bus Name