This tab has several sub-tabs for defining the Ethernet XGMII interface pins.
Table 1. Pins Tab: Clock and Reset Sub-Tab Settings
| Parameter |
Choices |
Notes |
| Interface Clock Input Connection Type |
gclk, rclk |
Default: rclk. Choose whether to use a global clock (gclk) or regional clock
(rclk). |
| Interface Clock Pin Name |
User defined |
Specify the clock name. |
| PCS Receive Reset Pin Name |
User defined |
Specify the pin names. Efinix recommends using the
default names. |
| PCS Transmit Reset Pin Name |
| PHY Lane Reset Pin Name |
Table 2. Pins Tab: Control Sub-Tab
| Parameter |
Selection |
Notes |
| Ethernet EEE Alert Enable Pin Name |
User defined |
Efinix recommends using the default names. |
| PMA Transmit Electrical Idle Pin Name |
User defined |
Efinix recommends using the default names. |
| Enable KR Base |
On, off |
Default: on. Turns on the KR base function. |
| KR Training tab |
User defined |
This tab defines the pin names for KR training. These pins are used when the
Enable KR Base option is turned on. Efinix
recommends using the default names. |
Table 3. Pins Tab: Error And Status Sub-Tab Settings
| Parameter |
Selection |
Notes |
| All |
User defined |
Define the pin names for the error and status signals. Efinix
recommends using the default names. |
Table 4. Pins Tab: Power Up Sub-Tab Settings
| Parameter |
Selection |
Notes |
| All |
User defined |
Define the pin names for the signals used when the interface powers up. Efinix recommends using the default names. |
Table 5. Pins Tab: XGMII Sub-Tab Settings
| Parameter |
Selection |
Notes |
| All |
User defined |
Define the pin names for the signals used for the XGMII signals. Efinix recommends using the default names. |