Design Check: Ethernet XGMII Messages
When you check your design, the Interface Designer applies design rules to your configuration settings. The following tables show some of the error messages you may encounter and explains how to fix them.
10gbase_kr_rule_external_clock (error)
| Message | PLL LC0 is fixed to be driven by reference clock 0 |
| To fix | In the <project>.peri.xml file, update
the value of
PMA_CMN__cmn_plllc_gen_preg__cmn_plllc_pfdclk1_sel_preg
to Refclk 0. |
10gbase_kr_rule_hw_drc (error)
| Message | Invalid value assigned to the following parameters:
<list_of_parameters> Found <#> HW Errors:
<list_of_errors> |
| To fix | Enter valid values for the parameters. |
10gbase_kr_rule_hw_drc (warning)
| Message | Found <#> HW Warnings: <list_of_errors> |
| To fix | Enter valid values for the parameters. |
10gbase_kr_rule_inst_name (error)
| Message | Instance name is empty. Valid characters are alphanumeric
characters with dash and underscore only |
| To fix | Enter a valid pin name. |
10gbase_kr_rule_interface_clock (error)
| Message | Interface Clock Input pin name cannot be empty |
| To fix | Add a pin name for the instance in the box. |
10gbase_kr_rule_invalid_hex_value (error)
| Message | The following hexadecimal parameters has invalid value: <list_of_parameters_with_error_message> |
| To fix | Update the parameters to use a hexadecimal value in a valid range. |
10gbase_kr_rule_osc_clock (error)
| Message | Oscillator is required to be configured |
| To fix | Create Oscillator instance with no enable pin. |
10gbase_kr_rule_resource (error)
| Message | Resource name is empty |
| To fix | Assign a resource. |
| Message | Resource is not a valid Ethernet XGMII device instance |
| To fix | Assign the instance to a resource that exists in the device. |
10gbase_kr_rule_resource_excluded (error)
| Message | Resource <resource> is excluded in Package Planner. Please use another resource |
| To fix | The pins for the affected resource have been excluded in the Package Planner, and cannot be assigned. Remove the excluded setting in the Package Planner or choose another resource. |
10gbase_kr_rule_res_usage (error)
| Message | Resource name conflict with instance <instance name> |
| To fix | The resource is already used. Choose another one. |
| Message | Resource conflicts with PCI Express resource <resource name> |
| To fix | You cannot use the same resource for PCI Express and Ethernet XGMII at the same time. Update one of the resources. (PCI Express uses quad 0 and quad 2.) |
common_quad_lane_rule_inst_name (error)
| Message | Instance name is empty. Valid characters are alphanumeric
characters with dash and underscore only |
| To fix | Enter a valid pin name. |
common_quad_lane_rule_pin_name (error)
| Message | The following pin(s) is/are identical across different QUAD: <list of pin and resource names> |
| To fix | Check the pin names to in the to ensure that you are not using the same name(s) as the lane-specific pin(s). |
common_quad_lane_rule_apb_clock (error)
| Message | APB Clock pin cannot be empty APB Clock pin cannot be empty when
APB is enabled |
| To fix | Enter the clock name in the or turn off the Enable Advanced Peripheral Bus option. |
common_quad_lane_rule_on_board_crystal (error)
| Message | Reference clock should be from on-board crystal when using <resource name> |
| To fix | Assign one of the lane-based instances to Q0 or Q2. |
common_quad_lane_rule_pll_common_setting (error)
| Message | Mismatch settings on the common PLL parameters across lanes: <list of clocks and lanes> |
| To fix | Transceivers in the same quad need to use the same PLL settings. |
common_quad_lane_rule_pll_common_setting (info)
| Message | Refclk 0 drives both PLL LC0 and PLL LC1 |
| To fix | This info message says that even though there is only one reference clock (Refclk 0), the software uses two internal transceiver PLLs (LC0 and LC1) to fulfill the lane PLL setting requirements. This setting happens when there are two different PLL LC parameter values used by the lanes in the quad. |
common_quad_lane_rule_refclk (error)
| Message | Found # lane instances using disabled Refclk 1 |
| To fix | Open the <project name>.peri.xml and
change the value of REFCLK_SEL to Refclk
0. |
| Message | Refclk 0 frequency invalid for instances: <list of instances>
and Refclk 1 frequency invalid for instances: <list of
instances> Refclk 0 frequency invalid for instances: <list of
instances> Refclk 1 frequency invalid for instances:
<list of instances> |
| To fix | Update reference clock frequency or use a different reference clock for the instances that are shown as invalid in the Quad-Lane Settings dialog box Console. |
| Message | PLL instance with resource <PLL resource list> is required to be configured when reference clock is not from on-board crystal |
| To fix | Create a PLL instance and assign one of the resource listed in the message, or turn on the Reference clock from on-board crystal option in the Quad-Lane Settings dialog box. |
| Message | Either one of the following PLL instance(s) required to enable output clock when reference clock is not from on-board crystal: <list of PLL instances with expected output clock> |
| To fix | Enable the output clock for one of the PLL instances. |
| Message | Either one of the following PLL instance(s) required to use <list of reference clock source> as exteranl reference clock source when PCIe reference clock is not from on-board crystal: <list of PLL instances> |
| To fix | If the reference clock is not from the on-board crystal, you need to set up an external reference clock. Add a PLL block and assign it to one of the listed PLL resources. Then, add a GPIO block as the PLL's reference clock and assign it to the resource shown in the PLL block. |
| Message | Either one of the following PLL instance(s) required to use local feedback mode when reference clock is not from on-board crystal: <list of PLL instances> |
| To fix | Change feedback mode to local for either one of the listed PLL instances. |
common_quad_lane_rule_refclk_usage (error)
| Message | At least 1 lane-based instance have to use reference clock 0 |
| To fix | For the transceivers in the same quad, at least one of the lanes must use reference clock 0. Use the Quad-Lane Settings dialog box to adjust the settings. |
| Message | Refclk 1 configured but not used by instances in the quad |
| To fix | Assign one lane-based instance to reference clock 1, or choose the Reference Clock 0 only option in the Quad Lane Settings dialog box. See Quad-Lane Settings |