About SEU Detection

An SEU happens when an environmental factor, such as background radiation, causes a digital circuit to malfunction. For FPGAs, the most frequent (and most worrisome) outcome of an SEU is that a CRAM bit is changed from its programmed value. Designs may not use every CRAM bit in the FPGA, so an SEU may or may not cause the FPGA to malfunction. However, in many situations the safest course of action is to assume that the FPGA's behavior is corrupted until it is reconfigured.

Topaz FPGAs contain built-in circuitry to help detect SEUs. This circuitry periodically monitors the FPGA's CRAM, detects if a CRAM value has changed from the programmed state, and sends status signals to user logic. The user logic can optionally trigger the FPGA to reconfigure using the SEU detection circuitry.

Topaz FPGAs can monitor the CRAM while the FPGA is operating normally in user mode; When the SEU detection circuitry is triggered, it calculates a 32-bit CRC value based on CRAM values and compares it to a CRC computed by the Efinity software and stored in the configuration bitstream. If the values are different, the SEU circuit determines an error has occurred and sends an error signal to the user logic. You can trigger the SEU detection circuitry automatically on a set interval, or manually using a signal.