Design Check: Fractional PLL Messages

Note: The design rules in Design Check: PLL Messages are also applicable to fractional PLL blocks. The messages in this topic apply to fractional PLLs only.

When you check your design, the Interface Designer applies design rules to your configuration settings. The following tables show some of the error messages you may encounter and explains how to fix them.

pll_rule_feedback_clock (error)

Message Feedback clock name is required with non-internal feedback
To fix Specify the clock pin name when using a non-internal feedback mode.
Message Feedback clock name <string> is not from the same PLL
To fix The clock name has to come from one of the output clock of the same PLL.
Message Feedback clock in local mode has to connect to output clock 0 or 1
To fix Set the local feedback mode to either output clock 0 or 1.
Message Feedback clock <string> is not connected to pll clkout
To fix Assign a feedback clock to one of the PLL output clock.

pll_rule_frac_en (error)

Message Fractional mode enable status is invalid, <err_message>
To fix Set Fractional mode enable status to valid value.

pll_rule_frac_feedback (error)

Message Feedback mode should be local in fractional mode
To fix Set feedback mode to local in the PLL Clock Calculator.
Message Feedback clock is not configured in fractional mode
To fix Add a feedback clock to Output Clock 1 in the PLL Clock Calculator
Message Feedback clock must be Output Clock 1 in fractional mode
To fix Set the feedback clock to Output Clock 1 in the PLL Clock Calculator.

pll_rule_frac_pdc (error)

Message Fractional mode shouldn't be used together with programmable duty cycle
To fix Disable either the programmable duty cycle or the fractional mode. You cannot use both modes at the same time.

pll_rule_frac_ssc (error)

Message SSC feature requires PLL operates in fractional mode
SSC feature requires PLL in local feedback mode
SSC feature requires CLKOUT1 to be configured as feedback clock
To fix To use SSC, the PLL must be in Local feedback mode with CLKOUT1 as the feedback clock, and fractional feedback must be turned on. See Programmable Duty Cycle and Fractional Feedback for steps to enable fractional feedback mode.

pll_rule_ssc_mode (error)

Message SSC Mode is invalid, <err_message>
To fix Set the SSC Mode to either DISABLE, STATIC, or DYNAMIC.

pll_rule_ssc_freq (error)

Message SSC Frequency is invalid, <err_message>
To fix Update SSC frequency to a valid range.

pll_rule_ssc_amp (error)

Message SSC Amplitude is invalid, <err_message>
To fix Update SSC Amplitude to a valid range.