Design Check: Configuration Messages

When you check your design, the Interface Designer applies design rules to your configuration settings. The following tables show some of the error messages you may encounter and explains how to fix them.

configuration_rule_clock (error)

Message	Internal Reconfiguration Interface is enabled but clock pin name is invalid
To fix	Enter a valid clock name.

configuration_rule_in_user_pin (error)

Message	User Status Pin Name should be configured for PCIe
To fix	The PCI Express interfaces requires the cfg_USR_STATUS pin. Enable the pin in the Interface Designer by turning on the Enable User Status Control option in the Design Explorer > Configuration > Remote Update tab. You can use the default pin name or choose your own name.
Message	User Status Pin Name should not be empty when enable user status control
To fix	When the Enable User Status Control is turned on, you need to specify a name for the pin in the User Status Pin Name box (Design Explorer > Configuration > Remote Update tab).
Message	No PCIe is configured for user status control.
To fix	The Enable User Status Control option is used with the PCI Express interface. Create a new PCI Express interface block or turn off the option.

configuration_rule_remote_update_retries (error)

Message	Invalid value assigned to Remote Update Retries
To fix	Select a different value for the parameter. Allowed values range 0-7.

ext_flash_rule_spi_flash (error)

Message	External controller access to flash memory cannot be enabled with the usage of SPI Flash
To fix	The SPI Flash can only be accessed either by the user logic in the FPGA or an external controller outside the FPGA. Disable the external controller access if you are using the SPI Flash Interface instance or delete the SPI Flash Interface instance in the design if you want to use an external flash controller.

ext_flash_rule_res_conflict (warning)

Message	The following instances use resources that can potentially corrupt the contents of the flash memory when the external controller access to flash memory is enabled <list of instances>
To fix	Some GPIO resources are connected to the internal SPI flash in F100F3S2 packages (See Table 1). You cannot use these resources when you enable the external controller access. Disable the external flash controller, or assign different resources.