Manually Configuring the PLL
If you want more control over the PLL, you can manually configure it in the PLL Clock Calculator using manual mode. To enable this mode, click the Manual Mode slider to turn it on.
| Option | Choices | Description |
|---|---|---|
| Pre-Divider (N) | 1, 2, 4 | The pre-divider value. |
| Multiplier (M) | 1, 2, 4 | The multiplier value. |
| Post-Divider (O) | 1, 2, 4, 8, 16, 32, 64, 128 | Post-divider value. |
| CLK Divider n | 2 - 128 | Clock divider for each output. |
| Phase Shift Value n | 0 - 7 | Post-divider VCO cycle delay to phase shift, in degrees: 0:
No phase shift 1: 0.5 2: 1 3:
1.5 4: 2 5: 2.5 6: 3 7:
3.5 |
The post-divider VCO cycle delay relates to the phase shift as shown in the following equation:
Phase shift (in degrees) = ( (Post-divider VCO cycle delay x O x FCLKOUT) / FVCO ) x 360
where:
- O is the post-VCO division ration
- FCLKOUT is the output frequency
- FVCO is the VCO frequency