GPIO Interface
Trion® FPGAs have general-purpose I/O (GPIO) pins that allow the FPGA to communicate with other components on your circuit board. When you create your RTL design in the Efinity® software, you use the Interface Designer to add GPIO blocks for each input, output, or bi-directional pin in your design.
Trion® GPIO pins have various features, depending on the
position of the pin and which package you are using. Refer to the Resource Assigner in
the Interface Designer for the features of the GPIO pin you want to use.
- GPIO that provide normal functionality
- GPIO with the double-data I/O (DDIO) feature that can capture twice the data
- LVDS as GPIO where the LVDS pin acts as GPIO instead of the LVDS function
The following sections describe the GPIO interface and how to use it in your design.