Trion I/O Banks

Table 1. I/O Banks by FPGA and Package
Package I/O Banks Voltage (V) DDIO Support Merged Banks
T4
F49, F81 1A - 1C, 2A, 2B 1.8, 2.5, 3.3
T8
F49, F81 1A - 1C, 2A, 2B 1.8, 2.5, 3.3
Q144 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1C_1D, 3B_3C
4A, 4B 3.3
T13
Q100F3 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1A_1B_1C, 1D_1E, 3B_3C, 3D_3E
4A, 4B 3.3
F169 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1B_1C_1D, 3A_3B, 3C_3D_3E
4A, 4B 3.3
F256 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1B_1C, 1D_1E. 3A_3B_3C, 3D_3E
4A, 4B 3.3
T20
WP80 1A-1E, 3A-3E 1.8, 2.5, 3.3 1B, 1D, 3C, 3D, 3E 1B_1C_1D_1E, 3A_3B_3C, 3D_3E_4A_4B
Q100F3 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1A_1B_1C, 1D_1E, 3B_3C, 3D_3E
4A, 4B 3.3
Q144 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1C_1D, 3B_3C
4A, 4B 3.3
F169 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1B_1C_1D, 3A_3B, 3C_3D_3E
4A, 4B 3.3
F256 1A - 1E, 3A - 3E 1.8, 2.5, 3.3 1B, 1C, 1D, 3B, 3C, 3D, 3E 1B_1C, 1D_1E. 3A_3B_3C, 3D_3E
4A, 4B 3.3
F324 1A - 1E, 2A - 2C, 3A - 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 1B_1C, 1D_1E, 3C_TR_BR
F400 1A - 1E, 2A - 2C, 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 3C_TR
T35
F256 1A - 1E, 2A, 2B, 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 1A_1B, 2A_2B_2C, 3C_TR_BR
F324 1A - 1E, 2A - 2C, 3A - 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 1B_1C, 1D_1E, 3C_TR_BR
F400 1A - 1E, 2A - 2C, 3C, 4A, 4B, TR, BR 1.8, 2.5, 3.3 1A - 1E, 3C, TR, BR 3C_TR
T55, T85, T120
F324 1A - 1G, 2D - 2F, 3D, TR, BR, 4E - 4F 1.8, 2.5, 3.3 Banks 1A-1G, 3D, TR, BR 1B_1C, 1D_1E_1F_1G, 3D_TR_BR
F484 1A - 1G, 2A - 2F, 3D, TR, BR, 4A - 4F 1.8, 2.5, 3.3 Banks 1A-1G, 3D, TR, BR 1B_1C, 1D_1E, 1F_1G, 3D_TR_BR
F576 1A - 1G, 2A - 2F, 3D, TR, BR, 4A - 4F 1.8, 2.5, 3.3 Banks 1A-1G, 3D, TR, BR 1B_1C, 1D_1E_1F_1G, 3D_TR_BR

Some I/O banks are merged at the package level by sharing VCCIO pins. Merged banks have underscores (_) between banks in the name (e.g., 1B_1C means 1B and 1C are connected).

Notice: Refer to the FPGA pinout for information on the I/O bank assignments.