DC and Switching Characteristics

Table 1. Absolute Maximum Ratings Conditions beyond those listed may cause permanent damage to the device. Device operation at the absolute maximum ratings for extended periods of time has adverse effects on the device.

Symbol	Description	Min	Max	Units
VCC	Core power supply	-0.5	1.42	V
VCCIO	I/O bank power supply	-0.5	4.6	V
	I/O bank 1A_1B_1C power supply	-0.5	4.1	V
VCCA_PLL	PLL analog power supply	-0.5	1.42	V
VCC25A_MIPI0 VCC25A_MIPI1	2.5 V analog power supply for MIPI	-0.5	2.75	V
VCC12A_MIPI0_TX VCC12A_MIPI1_TX	1.2 V TX analog power supply for MIPI	-0.5	1.42	V
VCC12A_MIPI0_RX VCC12A_MIPI1_RX	1.2 V RX analog power supply for MIPI	-0.5	1.42	V
VIN	I/O input voltage	-0.5	4.6	V
IIN	Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode.2	–	10	mA
TJ	Operating junction temperature	-40	125	°C
	Operating junction temperature	-40	105	°C
TSTG	Storage temperature, ambient	-55	150	°C

Table 2. Recommended Operating Conditions ¹

Symbol	Description	Min	Typ	Max	Units
VCC	Core power supply	1.15	1.2	1.25	V
VCCIO	1.8 V I/O bank power supply	1.71	1.8	1.89	V
	2.5 V I/O bank power supply	2.38	2.5	2.63	V
	3.3 V I/O bank power supply	3.14	3.3	3.47	V
VCCA_PLL	PLL analog power supply	1.15	1.2	1.25	V
VCC25A_MIPI0 VCC25A_MIPI1	2.5 V analog power supply for MIPI	2.38	2.5	2.63	V
VCC12A_MIPI0_TX VCC12A_MIPI1_TX	1.2 V TX analog power supply for MIPI	1.15	1.2	1.25	V
VCC12A_MIPI0_RX VCC12A_MIPI1_RX	1.2 V RX analog power supply for MIPI	1.15	1.2	1.25	V
VIN	I/O input voltage3	-0.3	–	VCCIO + 0.3	V
TJCOM	Operating junction temperature, commercial	0	–	85	°C
TJIND	Operating junction temperature, industrial	-40	–	100	°C

Table 3. Power Supply Ramp Rates

Symbol	Description	Min	Max	Units
tRAMP	Power supply ramp rate for all supplies.	VCCIO/10	10	V/ms

Table 4. Single-Ended I/O DC Electrical Characteristics

I/O Standard	VIL (V)		VIH (V)		VOL (V)	VOH (V)
	Min	Max	Min	Max	Max	Min
3.3 V LVCMOS	-0.3	0.8	2	VCCIO + 0.3	0.2	VCCIO - 0.2
3.3 V LVTTL	-0.3	0.8	2	VCCIO + 0.3	0.4	2.4
2.5 V LVCMOS	-0.3	0.7	1.7	VCCIO + 0.3	0.5	1.8
1.8 V LVCMOS	-0.3	0.35 * VCCIO	0.65 * VCCIO	VCCIO + 0.3	0.45	VCCIO - 0.45

Table 5. Single-Ended I/O and Dedicated Configuration Pins Schmitt Trigger Buffer Characteristic

Voltage (V)	VT+ (V) Schmitt Trigger Low-to-High Threshold	VT- (V) Schmitt Trigger High-to-Low Threshold	Input Leakage Current (μA)	Tri-State Output Leakage Current (μA)
3.3	1.73	1.32	±10	±10
2.5	1.37	1.01	±10	±10
1.8	1.05	0.71	±10	±10

Table 6. Single-Ended I/O Buffer Drive Strength CharacteristicsJunction temperature at T_J = 25 °C, power supply at nominal voltage.

CDONE has a drive strength of 1.

I/O Standard	3.3 V		2.5 V		1.8 V
Drive Strength	IOH (mA)	IOL (mA)	IOH (mA)	IOL (mA)	IOH (mA)	IOL (mA)
1	14.4	8.0	9.1	8.0	5.1	4.4
2	19.1	10.5	12.2	10.5	6.8	5.8
3	23.9	13.3	15.2	13.4	8.6	7.3
4	28.7	15.8	18.2	15.9	10.3	8.6

Table 7. Single-Ended I/O Internal Weak Pull-Up and Pull-Down ResistanceCDONE and CRESET_N also have an internal weak pull-up with these values.

I/O Standard	Internal Pull-Up			Internal Pull-Down			Units
	Min	Typ	Max	Min	Typ	Max
3.3 V LVTTL/LVCMOS	27	40	65	30	47	83	kΩ
2.5 V LVCMOS	35	55	120	37	62	118	kΩ
1.8 V LVCMOS	70	90	200	80	99	300	kΩ

Table 8. LVDS Pins Configured as Single-Ended I/O DC Electrical Characteristics

I/O Standard	VIL (V)		VIH (V)		VOL (V)	VOH (V)
	Min	Max	Min	Max	Max	Min
3.3 V LVCMOS	-0.3	0.8	2	VCCIO + 0.3	0.2	VCCIO - 0.2
3.3 V LVTTL	-0.3	0.8	2	VCCIO + 0.3	0.4	2.4

Table 9. LVDS Pins Configured as Single-Ended I/O Buffer Drive Strength CharacteristicsJunction temperature at TJ = 25 °C, power supply at nominal voltage, device in nominal process (TT).

I/O Standard	Drive Strength
	IOH(mA)	IOL(mA)
3.3 V	37.6	22

Table 10. LVDS Pins Configured as Single-Ended I/O DC Electrical Characteristics

Voltage (V)	Input Leakage Current (μA)	Tri-State Output Leakage Current (μA)
3.3	±10	±10

Table 11. LVDS Pins Configured as Single-Ended I/O Internal Weak Pull-Up Resistance

I/O Standard	Internal Pull-Up			Units
	Min	Typ	Max
3.3 V LVTTL/LVCMOS	27	40	65	kΩ

Table 12. Maximum Toggle Rate recommends that you perform simulations using the IBIS model to determine the maximum toggle rate for your design.

I/O Standard	Package	Max Toggle Rate	Units
3.3 V LVTTL/LVCMOS	All	400	Mbps
2.5 V LVCMOS	All	400	Mbps
1.8 V LVCMOS	All	400	Mbps
LVDS	All	800	Mbps

Table 13. Single-Ended I/O and LVDS Pins Configured as Single-Ended I/O Rise and Fall TimeData are based on the following IBIS simulation setup:

• Weakest drive strength model
• Typical simulation corner setting
• RLC circuit with 6.6 pF capacitance, 16.6 nH inductance, 0.095 ohm resistance, and 25 °C temperature

Note: For a more accurate data, you need to perform the simulation with your own circuit.

I/O Standard	Rise Time (TR)		Fall Time (TF)		Units
	Slow Slew Rate Enabled	Slow Slew Rate Disabled	Slow Slew Rate Enabled	Slow Slew Rate Disabled
3.3 V LVTTL/LVCMOS	1.13	1.02	1.24	1.17	ns
2.5 V LVCMOS	1.4	1.3	1.44	1.31	ns
1.8 V LVCMOS	2.14	2.01	2.05	1.85	ns
LVDS pins configured as 3.3 V LVTTL/LVCMOS	0.45		0.44		ns

Table 14. Block RAM Characteristics

Symbol	Description	I4 Speed Grade	Units
fMAX	Block RAM maximum frequency.	400	MHz

Table 15. Multiplier Block Characteristics

Symbol	Description	I4 Speed Grade	Units
fMAX	Multiplier block maximum frequency.	400	MHz